Akio TAKAGI


A 120-Gbit/s 1.27-W 520-mVpp 2:1 Multiplexer IC Using Self-Aligned InP/InGaAs/InP DHBTs with Emitter Mesa Passivation
Yutaka ARAYASHIKI Yukio OHKUBO Taisuke MATSUMOTO Yoshiaki AMANO Akio TAKAGI Yutaka MATSUOKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/08/01
Vol. E93-C  No. 8  pp. 1273-1278
Type of Manuscript:  Special Section PAPER (Special Section on Heterostructure Microelectronics with TWHM 2009)
Category: III-V High-Speed Devices and Circuits
Keyword: 
DHBTself-alignedledgeMUXbroadband impedance matchingmodule
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