Akihiro CHIYONOBU


A Low-Power Instruction Issue Queue for Microprocessors
Shingo WATANABE Akihiro CHIYONOBU Toshinori SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4  pp. 400-409
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
microprocessorsinstruction schedulingCAMRAMlow-power
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An Energy-Efficient Clustered Superscalar Processor
Toshinori SATO Akihiro CHIYONOBU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4  pp. 544-551
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Digital
Keyword: 
low power architectureenergy reductionclustered processorsdual-voltage pipelinecritical path prediction
 Summary | Full Text:PDF