Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/12/25 Vol. E81-ANo. 12pp. 2595-2604 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Co-design Keyword: embedded system design, hardware/software codesign, retargetable compiler,
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1998/12/25 Vol. E81-ANo. 12pp. 2621-2629 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Compiler Keyword: compiler optimization, instruction scheduling, low power, caches,
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1998/09/25 Vol. E81-CNo. 9pp. 1448-1454 Type of Manuscript: Special Section PAPER (Special Issue on Novel VLSI Processor Architectures) Category: Keyword: merged DRAM/logic LSIs, data retention time, refresh, yield,
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1997/10/25 Vol. E80-DNo. 10pp. 974-981 Type of Manuscript: Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design) Category: High Level Synthesis Keyword: embedded systems, system on chip, CPU, memory,
