Akihiko HYODO

Bitwidth Optimization for Low Power Digital FIR Filter Design
Kosuke TARUMI Akihiko HYODO Masanori MUROYAMA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/04/01
Vol. E88-A  No. 4  pp. 869-875
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 17th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
low power design, bitwidth optimization, digital FIR filter, 
 Summary | Full Text:PDF
A Power Reduction Scheme for Data Buses by Dynamic Detection of Active Bits
Masanori MUROYAMA Akihiko HYODO Takanori OKUMA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 598-605
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
active bit, low power, datapath, data bus, dynamic, 
 Summary | Full Text:PDF
Variable Pipeline Depth Processor for Energy Efficient Systems
Akihiko HYODO Masanori MUROYAMA Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12  pp. 2983-2990
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Power Optimization
Keyword: 
energy efficient design, variable pipeline depth, dynamic pipeline and voltage scaling, optimal pipelining, 
 Summary | Full Text:PDF