A Threshold Neuron Pruning for a Binarized Deep Neural Network on an FPGA

Tomoya FUJII  Shimpei SATO  Hiroki NAKAHARA  

Publication:   IEICE TRANSACTIONS on Information and Systems
Publicized: 2017/11/17
DOI: 10.1587/transinf.2017RCP0013
Full Text: PDF(995.7KB)