Evaluating Energy-Efficiency of DRAM Channel Interleaving Schemes for Multithreaded Programs

Satoshi IMAMURA  Yuichiro YASUI  Koji INOUE  Takatsugu ONO  Hiroshi SASAKI  Katsuki FUJISAWA  

Publication:   IEICE TRANSACTIONS on Information and Systems
Publicized: 2018/06/08
DOI: 10.1587/transinf.2017EDP7296
Full Text: PDF(1.2MB)