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Wafer Level CSP Technology and Application to Embedded Inductor
C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition) Vol.J92-C No.11 pp.671-679
Publication Date: 2009/11/01
Online ISSN: 1881-0217
Print ISSN: 1345-2827
Type of Manuscript: Special Section PAPER (Special Issue on Advanced Packging and Environmentally Conscious Packaging Technologies in Next-Generation Electronic Equipment)
Full Text(in Japanese): PDF(2MB)
About ten years passed after the package of the size of a real chip (It is completely equal to the area of the chip) that had the epoxy resin encapsulant and the post had been published. It is called WLP (Wafer Level Package) now, it is adopted for a lot of small electrical equipment, and it can be said that a firm position as the semiconductor package was built. The process technology of WLP that has the above-mentioned feature and the application development technology to reliability and the high frequency field are described in this paper.