Study for Reading Method of Stacked NAND Type MRAM Using Spin Transistor

Shoto TAMAI  Shigeyoshi WATANABE 

Publication
C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)  Vol.J91-C  No.11  pp.666-667
Publication Date: 2008/11/01
Online ISSN: 1881-0217
Print ISSN: 1345-2827
Type of Manuscript: LETTER
Category: 
Keyword: 
non-volatile memory,  MRAM,  spin transistor,  stacked NAND structure, 

Full Text(in Japanese): PDF(144.4KB)

Summary: 
In this paper stacked NAND type MRAM using spin transistor has been proposed. It's reading method focused on optimization of gate voltage for the selected and passing memory cell was investigated. Large stacked number of 32-64 more than that of Flash memory and fast read time of less than 60ns have been realized.