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Design of Reconfigurable RF CMOS Wireless Circuit
Kenichi OKADA
Yoshiaki YOSHIHARA
Hirotaka SUGAWARA
Kazuya MASU
Publication
C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition) Vol.J89-C No.7 pp.499-507
Publication Date: 2006/07/01
Online ISSN: 1881-0217
Print ISSN: 1345-2827
Type of Manuscript: PAPER
Category:
Keyword:
reconfigurable,
RF CMOS,
wireless,
multi-standard,
multi- mode,
Full Text(in Japanese): PDF(659.5KB)
Summary:
This paper proposes a dynamic reconfigurable architecture for analog RF circuits. The architecture consists of RF circuits and a control circuit. The RF circuits can be reconfigured by bias voltages of transistors and variable passive components, and the RF circuit block can also be switched dynamically. The proposed architecture can realize the multi-band/mode RF circuit in single chip for the Software Defined Radio, which achieves considerable reduction of circuit area and power consumption. On the other hand, we can obtain robust RF circuits by the dynamic reconfiguration for the process variation, the dynamic change of temperature, etc.
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