Advanced Studies on Noise Problems in VLSI Systems

Makoto NAGATA  

C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)   Vol.J100-C   No.2   pp.82-90
Publication Date: 2017/02/01
Online ISSN: 1881-0217
Type of Manuscript: INVITED PAPER
semiconductor integrated circuits,  power noise,  Silicon substrate noise,  unwanted radio waves,  noise interference,  

Full Text(in Japanese): FreePDF(2.3MB)

Noise suppression and noise immunity become of more importance in the design of advanced VLSI systems. This paper focuses on analysis techniques of power noise by the operation of digital integrated circuits, and also provides experimental results with Silicon test chips. They include the technique to simulate the generation and propagation of power noise in a chip with system-level capability to involve interactions among the chip and its package and printed circuit board for system assembly. The emulation technique is also covered to evaluate the impact of power noise on system-level performance due to its coupling and interference. The paper also discusses the challenges of and solutions for noise problems with unwanted radio waves in broad band wireless communication systems.