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Design Optimization for Process-Variation-Tolerant 22-nm FinFET-Based 6-T SRAM Cell with Worst-Case Sampling Method
Sangheon OH Changhwan SHIN
IEICE TRANSACTIONS on Electronics
Publication Date: 2016/05/01
Online ISSN: 1745-1353
Type of Manuscript: BRIEF PAPER
random variation, FinFET, SRAM, worst-case sampling,
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To find the optimal design in alleviating the effect of random variations on a SRAM cell, a worst-case sampling method is used. From the quantitative analysis using this method, the optimal designs for a process-variation-tolerant 22-nm FinFET-based 6-T SRAM cell are proposed and implemented through cell layouts and a dual-threshold-voltage designs.