A Low Power Pulse Generator for Test Platform Applications

Jen-Chieh LIU  Pei-Ying LEE  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E99-A   No.7   pp.1415-1416
Publication Date: 2016/07/01
Online ISSN: 1745-1337
DOI: 10.1587/transfun.E99.A.1415
Type of Manuscript: Special Section LETTER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
arbitrary waveform,  pulse generator,  low power,  

Full Text: PDF(569KB)>>
Buy this Article




Summary: 
A 62ps timing resolution pulse generator (PG) is presented. The PG adopts the multi-phase ring oscillator and the pulse combiner circuit (PCC) to achieve the low timing error. The PCC can decide an arbitrary waveform via 16 phase outputs. PCC adopts the coarse-tuning stage (CTS) and the fine-tuning (FTS) to define the operational frequency range and the timing resolution, respectively. Hence, PCC uses edge combiner (EC) to combine the period window of CTS. The latency of PG is only 3 cycle times. The operational frequency range of PG is from 15MHz to 245MHz. The timing resolution and average accuracy of PG are 62.5ps and ±0.5 LSB, respectively. The RMS jitter and peak-to-peak jitter of PG are 6.55ps and 66.67ps, respectively, at 245MHz.