High-Speed Interconnection for VLSI Systems Using Multiple-Valued Signaling with Tomlinson-Harashima Precoding

Yosuke IIJIMA  Yuuki TAKADA  Yasushi YUMINAKA  

IEICE TRANSACTIONS on Information and Systems   Vol.E97-D   No.9   pp.2296-2303
Publication Date: 2014/09/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2013LOP0021
Type of Manuscript: Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Communication for VLSI
high-speed interface,  Tomlinson-Harashima precoding (THP),  intersymbol interference,  multiple-valued signaling,  low-voltage VLSI systems,  

Full Text: PDF(4.3MB)
>>Buy this Article

The data rate of VLSI interconnections has been increasing according to the demand for high-speed operation of semiconductors such as CPUs. To realize high performance VLSI systems, high-speed data communication has become an important factor. However, at high-speed data rates, it is difficult to achieve accurate communication without bit errors because of inter-symbol interference (ISI). This paper presents high-speed data communication techniques for VLSI systems using Tomlinson-Harashima Precoding (THP). Since THP can eliminate the ISI with limiting average and peak power of transmitter signaling, THP is suitable for implementing advanced low-voltage VLSI systems. In this paper, 4-PAM (Pulse amplitude modulation) with THP has been employed to achieve high-speed data communication in VLSI systems. Simulation results show that THP can remove the ISI without increasing peak and average power of a transmitter. Moreover, simulation results clarify that multiple-valued data communication is very effective to reduce implementation costs for realizing high-speed serial links.