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Correlations between BTIInduced Degradations and Process Variations on ASICs and FPGAs
Michitarou YABUUCHI Ryo KISHIDA Kazutoshi KOBAYASHI
Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Vol.E97A
No.12
pp.23672372 Publication Date: 2014/12/01
Online ISSN: 17451337 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Device and Circuit Modeling and Analysis Keyword: BTI, process variation, reliability,
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Summary:
We analyze the correlation between BTI (Bias Temperature Instability) induced degradations and process variations. Those reliability issues are correlated. BTI is one of the most significant agingdegradations on LSIs. Threshold voltages of MOSFETs increase with time when biases stress their gates. It shows a strong effect of BTI on highly scaled LSIs in the same way as the process variations. The accurate prediction of the combinational effects is indispensable. We should analyze both agingdegradations and process variations of MOSFETs to explain the correlation. We measure frequencies of ROs (Ring Oscillators) of 65nm process test circuits on two types of LSIs, ASICs and FPGAs. There are 98 and 837 ROs on our ASICs and FPGAs respectively. The frequencies of ROs follow gaussian distributions. We describe the highest frequency group as the “fast” conditon, the average group as the “typical” conditon and the lowest group as the “slow” conditon. We measure the agingdegradations of the ROs of the three conditions on the accelerated test. The degradations can be approximated by logarithmic function of stress time. The degradation at the “fast” condition has a higher impact on the frequency than the “slow” one. The correlation coefficient is 0.338. In this case, we can define a smaller design margin for BTIinduced degradations than that without considering the correlation because the degradation at the “slow” conditon is smaller than the average and the fast.

