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New Multiple-Times Programmable CMOS ROM Cell
Seong Yeol JEONG
Sung Min SEO
Young June PARK
IEICE TRANSACTIONS on Electronics Vol.E95-C No.6 pp.1098-1103
Publication Date: 2012/06/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Integrated Electronics
Full Text: PDF(1.9MB)
New concept of CMOS nonvolatile memory is presented with demonstration of cell implementations. The memory cell, which is a comparator basically, makes use of comparator offset for storage quantity and the FN stress phenomena for cell programming. We also propose the stress-packet operation which is the relevant programming method to finely control the offset of the memory cell. The memory cell is multiple-time programmable while it is implemented in a standard CMOS process. We fabricated the memory cell arrays of the latch comparator and demonstrated that it is rewritten several times. We also investigated the reliability of cell data retention by monitoring programmed offsets for several months.