High Throughput Turbo Decoding Scheme

Jaesung CHOI  Joonyoung SHIN  Jeong Woo LEE 

Publication
IEICE TRANSACTIONS on Communications  Vol.E95-B  No.6  pp.2109-2112
Publication Date: 2012/06/01
Online ISSN: 1745-1345
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Fundamental Theories for Communications
Keyword: 
turbo decoder,  throughput,  clock cycle,  memory, 

Full Text: PDF(352.2KB)

Summary: 
A new high-throughput turbo decoding scheme adopting double flow, sliding window and shuffled decoding is proposed. Analytical and numerical results show that the proposed scheme requires low number of clock cycles and small memory size to achieve a BER performance equivalent to those of existing schemes.