Differential Behavior Equivalent Classes of Shift Register Equivalents for Secure and Testable Scan Design

Katsuya FUJIWARA  Hideo FUJIWARA  Hideo TAMAMOTO 

Publication
IEICE TRANSACTIONS on Information and Systems  Vol.E94-D  No.7  pp.1430-1439
Publication Date: 2011/07/01
Online ISSN: 1745-1361
Print ISSN: 0916-8532
Type of Manuscript: PAPER
Category: Dependable Computing
Keyword: 
design-for-testability,  scan design,  shift register equivalents,  security,  scan-based side-channel attack, 

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Summary: 
It is important to find an efficient design-for-testability methodology that satisfies both security and testability, although there exists an inherent contradiction between security and testability for digital circuits. In our previous work, we reported a secure and testable scan design approach by using extended shift registers that are functionally equivalent but not structurally equivalent to shift registers, and showed a security level by clarifying the cardinality of those classes of shift register equivalents (SR-equivalents). However, SR-equivalents are not always secure for scan-based side-channel attacks. In this paper, we consider a scan-based differential-behavior attack and propose several classes of SR-equivalent scan circuits using dummy flip-flops in order to protect the scan-based differential-behavior attack. To show the security level of those SR-equivalent scan circuits, we introduce a differential-behavior equivalent relation and clarify the number of SR-equivalent scan circuits, the number of differential-behavior equivalent classes and the cardinality of those equivalent classes.