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A Novel Body Bias Selection Scheme for Leakage Minimization
IEICE TRANSACTIONS on Electronics Vol.E94-C No.9 pp.1490-1493
Publication Date: 2011/09/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Electronic Circuits
Full Text: PDF
In this letter, a novel body bias selection scheme for minimizing the leakage of MOS transistors is presented. The proposed scheme directly monitors leakages at present and adjacent body bias voltages, and dynamically updates the voltage at which the leakage is minimized regardless of process and temperature variations. Comparison results in a 46 nm CMOS technology indicated that the proposed scheme achieved leakage reductions of up to 68% as compared to conventional body biasing schemes.