A Signal Detection Circuit for 8b/10b 2.5 Gb/s Serial Data Communication System in 90 nm CMOS

Kozue SASAKI  Hiroki SATO  Akira HYOGO  Keitaro SEKINE  

Publication
IEICE TRANSACTIONS on Electronics   Vol.E93-C   No.6   pp.864-866
Publication Date: 2010/06/01
Online ISSN: 1745-1353
DOI: 10.1587/transele.E93.C.864
Print ISSN: 0916-8516
Type of Manuscript: BRIEF PAPER
Category: 
Keyword: 
equalizer,  adaptive,  CMOS,  high-speed signal transmissions,  

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Summary: 
This paper presents a CMOS signal detection circuit for 2.5 Gb/s serial data communication system over FR-4 backplane. This overcomes characteristics deviation of full-wave rectifier-based simple power detection circuits due to data pattern and temperature by using an edge detector and a sample-hold circuit.