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Study of the DC Performance of Fabricated Magnetic Tunnel Junction Integrated on Back-End Metal Line of CMOS Circuits
Fumitaka IGA Masashi KAMIYANAGI Shoji IKEDA Katsuya MIURA Jun HAYAKAWA Haruhiro HASEGAWA Takahiro HANYU Hideo OHNO Tetsuo ENDOH
IEICE TRANSACTIONS on Electronics
Publication Date: 2010/05/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Fundamentals and Applications of Advanced Semiconductor Devices)
Category: Flash/Advanced Memory
magnetic tunnel junction (MTJ), spin-transfer torque RAM (STT-RAM), tunnel magnetoresistance (TMR), magnetoresistive RAM (MRAM), current-induced magnetization switching,
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In this paper, we have succeeded in the fabrication of high performance Magnetic Tunnel Junction (MTJ) which is integrated in CMOS circuit with 4-Metal/ 1-poly Gate 0.14 µm CMOS process. We have measured the DC characteristics of the MTJ that is fabricated on via metal of 3rd layer metal line. This MTJ of 60180 nm2 achieves a large change in resistance of 3.52 kΩ (anti-parallel) with TMR ratio of 151% at room temperature, which is large enough for sensing scheme of standard CMOS logic. Furthermore, the write current is 320 µA that can be driven by a standard MOS transistor. As the results, it is shown that the DC performance of our fabricated MTJ integrated in CMOS circuits is very good for our novel spin logic (MTJ-based logic) device.