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Analysis of Jitter in CMOS Ring Oscillators due to Power Supply Noise
IEICE TRANSACTIONS on Electronics Vol.E92-C No.7 pp.973-975
Publication Date: 2009/07/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: LETTER
Category: Electronic Circuits
power supply noise,
Full Text: PDF
In this letter a new analytical method is presented for estimating the timing jitter of CMOS ring oscillators due to power supply noise. Predictive jitter equation is presented, and the proposed method is utilized to study the jitter induced by power supply noise in an inverter-based ring oscillator, which is designed and simulated in SMIC 0.13-µm standard CMOS process. A comparison between the results obtained by the proposed method and those obtained by HSPICE simulation proves the accuracy of the predictive equation. Most of the errors between the theoretic calculation and simulation results are less than 3 ps.