A Low-Power Second-Order Two-Channel Time-Interleaved ΣΔ Modulator for Broadband Applications

Xiao YANG  Hong ZHANG  Guican CHEN 

Publication
IEICE TRANSACTIONS on Electronics  Vol.E92-C  No.6  pp.852-859
Publication Date: 2009/06/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
ΣΔ modulator,  time-interleaved,  channel mismatch,  folded noise, 

Full Text: PDF(792.9KB)

Summary: 
Time-interleaving is an efficient approach to increase the effective sampling rate of the ΣΔ modulators, but time-interleaved (TI) ΣΔ modulators are sensitive to channel mismatch, which causes the quantization noise folded back into the band of interest. To reduce the folded noise caused by the channel mismatch of two-channel TI ΣΔ modulators, a low-power second-order two-channel TI ΣΔ modulator is proposed. The noise transfer function (NTF) of the modulator is a band-pass filter. By using this band-pass NTF, the folded noised can be reduced. The entire modulator can be implemented by employing three op-amps, which is beneficial for power consumption. The circuit of implementation for the proposed modulator is designed in 0.18 µm COMS technology. The proposed modulator can achieve a SNDR of 78.9 dB with a channel mismatch of 0.5% and a linear gradient mismatch of 0.4% for unity sampling capacitors. Monte Carlo simulation is done with a random Gaussian mismatch of 0.4% standard deviation for all capacitors, resulting in an average SNDR of 80.5 dB. It is indicated that the proposed TI modulator is insensitive to the channel mismatch. The total power consumption is 19.5 mW from a 1.8 V supply.