An Embedded 8b 240 MS/s 1.36 mm2 104 mW 0.18 µm CMOS ADC for DVDs with Dual-Mode Inputs

Young-Jae CHO  Se-Won KIM  Kyung-Hoon LEE  Hee-Cheol CHOI  Young-Lok KIM  Seung-Hoon LEE  

IEICE TRANSACTIONS on Electronics   Vol.E89-C   No.5   pp.636-641
Publication Date: 2006/05/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: PAPER
Category: Electronic Circuits
ADC,  CMOS,  low power,  small area,  on-chip I/V references,  

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This work describes an 8b 240 MS/s CMOS ADC as one of embedded core circuits for high-performance displays based on low-noise on-chip references and dual-mode inputs with the requirements of limited pins, low power, and small size at high speed. The proposed ADC uses externally connected pins only for analog inputs, digital outputs, and supplies. The ADC employs (1) a two-step pipeline architecture to optimize power and chip size at the target sampling frequency of 240 MHz, (2) advanced bootstrapping techniques to achieve high signal bandwidth in the input SHA, and (3) RC filter-based on-chip current and voltage references to improve noise performance with a power-off function for portable applications. The prototype ADC is implemented in a 0.18 µm CMOS and simultaneously integrated in a DVD system with dual-mode inputs. The prototype ADC shows the measured DNL and INL within 0.49LSB and 0.69LSB, and the SNDR and SFDR exceeding 38 dB and 50 dB for inputs up to the Nyquist frequency at 240 MS/s. The ADC consumes 104 mW at 240 MS/s and an active die area is 1.36 mm2 .