System LSI: Challenges and Opportunities

Tadahiro KURODA   

Publication
IEICE TRANSACTIONS on Electronics   Vol.E89-C   No.3   pp.213-220
Publication Date: 2006/03/01
Online ISSN: 1745-1353
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: INVITED
Keyword: 
CMOS ,  scaling ,  power aware ,  IC design ,  computing ,  communications ,  

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Summary: 
Scaling of CMOS Integrated Circuit is becoming difficult, due mainly to rapid increase in power dissipation. How will the semiconductor technology and industry develop? This paper discusses challenges and opportunities in system LSI from three levels of perspectives: transistor level (physics), IC level (electronics), and business level (economics).