High-Speed Continuous-Time Subsampling Bandpass ΔΣ AD Modulator Architecture Employing Radio Frequency DAC

Masafumi UEMORI  Haruo KOBAYASHI  Tomonari ICHIKAWA  Atsushi WADA  Koichiro MASHIKO  Toshiro TSUKADA  Masao HOTTA  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E89-A   No.4   pp.916-923
Publication Date: 2006/04/01
Online ISSN: 1745-1337
DOI: 10.1093/ietfec/e89-a.4.916
Print ISSN: 0916-8508
Type of Manuscript: Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
continuous-time,  subsampling,  bandpass,  ΔΣ modulator,  RF DAC,  jitter,  

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Summary: 
This paper proposes a continuous-time bandpass ΔΣAD modulator architecture which performs high-accuracy AD conversion of high frequency analog signals and can be used for next-generation radio systems. We use an RF DAC inside the modulator to enable subsampling and also to make the SNDR of the continuous-time modulator insensitive to DAC sampling clock jitter. We have confirmed that this is the case by MATLAB simulation. We have also extended our modulator to multi-bit structures and show that this alleviates excess loop delay problems.