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Signed-Weight Arithmetic and Its Application to a Field-Programmable Digital Filter Architecture
Takafumi AOKI Yoshiki SAWADA Tatsuo HIGUCHI
IEICE TRANSACTIONS on Electronics
Publication Date: 1999/09/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Integrated Electronics and New System Paradigms)
Category: Configurable Computing and Fault Tolerance
computer arithmetic, redundant number systems, digital signal processing, FIR filter, FPGAs,
Full Text: PDF(2.7MB)>>
This paper presents a new number representation called the Signed-Weight (SW) number system, which is useful for designing configurable counter-tree architectures for digital signal processing applications. The SW number system allows the unified manipulation of positive and negative numbers in arithmetic circuits by adjusting the signs assigned to individual digit positions. This makes possible the construction of highly regular arithmetic circuits without introducing irregular arithmetic operations, such as negation and sign extension in the two's complement representation. This paper also presents the design of a Field-Programmable Digital Filter (FPDF) architecture--a special-purpose FPGA architecture for high-speed FIR filtering--using the proposed SW arithmetic system.