For Full-Text PDF, please login, if you are a member of IEICE,|
or go to Pay Per View on menu list, if you are a nonmember of IEICE.
Graceful Degradation for Multiprocessor Realization of Maximally Flat FIR Digital Filters
Saed SAMADI Akinori NISHIHARA Nobuo FUJII
IEICE TRANSACTIONS on Electronics
Publication Date: 1994/07/25
Print ISSN: 0916-8516
Type of Manuscript: Special Section PAPER (Special Issue on Super Chip for Intelligent Integrated Systems)
graceful degradation, FIR digital filters, modular array realization, digital signal processing,
Full Text: PDF(618.6KB)>>
In this paper we propose a method for increasing the reliability in multiprocessor realization of lowpass and highpass FIR digital filters possessing a maximally flat magnitude response. This method is based on the use of array realization of the filter which has been proposed earlier by the authors. It is shown that if a processing module of the array functions erroneously, it is possible to exclude the module and still obtain a lowpass FIR filter. However, as a price we should tolerate a slight degradation in the magnitude response of the filter that is equivalent to a wider transition band. We also analyze the behavior of the filter when our proposed schemes are implemented on more than one module. The justification of our approach is based on that a slight degradation of the spectral characteristics of a filter may be well tolerated in most filtering applications and thus a graceful degradation in the frequency domain can sufficiently reduce the vulnerability to errors.