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Code Assignment Algorithm for Highly Parallel Multiple-Valued Combinational Circuits Based on Partition Theory
Saneaki TAMAKI Michitaka KAMEYAMA Tatsuo HIGUCHI
IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/05/25
Print ISSN: 0916-8532
Type of Manuscript: Special Section PAPER (Special Issue on Multiple-Valued Logic)
Category: Logic Design
multiple-valued coding, locally computable circuit, unary operation, partition theory, closed chain set,
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Design of locally computable combinational circuits is a very important subject to implement high-speed compact arithmetic and logic circuits in VLSI systems. This paper describes a multiple-valued code assignment algorithm for the locally computable combinational circuits, when a functional specification for a unary operation is given by the mapping relationship between input and output symbols. Partition theory usually used in the design of sequential circuits is effectively employed for the fast search for the code assignment problem. Based on the partition theory, mathematical foundation is derived for the locally computable circuit design. Moreover, for permutation operations, we propose an efficient code assignment algorithm based on closed chain sets to reduce the number of combinations in search procedure. Some examples are shown to demonstrate the usefulness of the algorithm.