An Optimized Low-Power Optical Memory Access Network for Kilocore Systems

Tao LIU  Huaxi GU  Yue WANG  Wei ZOU  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E102-D   No.5   pp.1085-1088
Publication Date: 2019/05/01
Online ISSN: 1745-1361
DOI: 10.1587/transinf.2018EDL8234
Type of Manuscript: LETTER
Category: Computer System
Keyword: 
optical network-on-chip,  memory access,  

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Summary: 
An optimized low-power optical memory access network is proposed to alleviate the cost of microring resonators (MRs) in kilocore systems, such as the pass-by loss and integration difficulty. Compared with traditional electronic bus interconnect, the proposed network reduces power consumption and latency by 80% to 89% and 21% to 24%. Moreover, the new network decreases the number of MRs by 90.6% without an increase in power consumption and latency when making a comparison with Optical Ring Network-on-Chip (ORNoC).