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DeltaSigma ADC Based on SwitchedCapacitor Integrator with FIR Filter Structure
Satoshi SAIKATSU Akira YASUDA
Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Vol.E102A
No.3
pp.498506 Publication Date: 2019/03/01
Online ISSN: 17451337
DOI: 10.1587/transfun.E102.A.498
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics) Category: Keyword: analogtodigital converter, deltasigma modulator, finiteimpulse response filter, switchedcapacitor integrator,
Full Text: FreePDF(1.6MB)
Summary:
This paper presents a novel deltasigma modulator that uses a switchedcapacitor (SC) integrator with the structure of a finite impulse response (FIR) filter in a loop filter configuration. The deltasigma analogtodigital converter (ΔΣADC) is used in various conversion systems to enable lowpower, highaccuracy conversion using oversampling and noise shaping. Increasing the gain coefficient of the integrator in the loop filter configuration of the ΔΣADC suppresses the quantization noise that occurs in the signal band. However, there is a tradeoff relationship between the integrator gain coefficient and system stability. The SC integrator, which contains an FIR filter, can suppress quantization noise in the signal band without requiring an additional operational amplifier. Additionally, it can realize a higher signaltoquantization noise ratio. In addition, the poles that are added by the FIR filter structure can improve the system's stability. It is also possible to improve the flexibility of the pole placement in the system. Therefore, a noise transfer function that does not contain a large gain peak is realized. This results in a stable system operation. This paper presents the essential design aspects of a ΔΣADC with an FIR filter. Two types of simulation results are examined for the proposed first and secondorder, and these results confirm the effectiveness of the proposed architecture.

