Floating-Point Multiplier with Concurrent Error Detection Capability by Partial Duplication

Nobutaka KITO  Kazushi AKIMOTO  Naofumi TAKAGI  

Publication
IEICE TRANSACTIONS on Information and Systems   Vol.E100-D   No.3   pp.531-536
Publication Date: 2017/03/01
Online ISSN: 1745-1361
Type of Manuscript: PAPER
Category: Dependable Computing
Keyword: 
concurrent error detection,  floating-point multiplier,  duplication,  truncated multiplier,  

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Summary: 
A floating-point multiplier with concurrent error detection capability by partial duplication is proposed. It uses a truncated multiplier for checking of the significand (mantissa) multiplication instead of full duplication. The proposed multiplier can detect any erroneous output with error larger than one unit in the last place (1 ulp) of the significand, which may be overlooked by residue checking. Its circuit area is smaller than that of a fully duplicated one. Area overhead of a single-precision multiplier is about 78% and that of a double-precision one is about 65%.