Design of a High-Throughput Sliding Block Viterbi Decoder for IEEE 802.11ac WLAN Systems

Kai-Feng XIA  Bin WU  Tao XIONG  Cheng-Ying CHEN  

Publication
IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences   Vol.E100-A   No.8   pp.1606-1614
Publication Date: 2017/08/01
Online ISSN: 1745-1337
Type of Manuscript: PAPER
Category: Digital Signal Processing
Keyword: 
sliding block Viterbi decoder (SBVD),  add-compare-select (ACS),  IEEE 802.11ac,  high-throughput,  

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Summary: 
This paper presents a high-throughput sliding block Viterbi decoder for IEEE 802.11ac systems. A 64-state bidirectional sliding block Viterbi method is proposed to meet the speed requirement of the system. The decoder throughput goes up to 640Mbps, which can be further increased by adding the block parallelism. Moreover, a modified add-compare-select (ACS) unit is designed to enhance the working frequency. The modified ACS unit obtains nearly 26% speed-up, compared to the conventional ACS unit. However, the area overhead and power dissipation are almost the same. The decoder is designed in a SMIC 0.13µm technology, and it occupies 1.96mm2 core area and 105mW power consumption with an energy efficiency of 0.1641nJ/bit with a 1.2V voltage supply.