Keyword : voltage scaling


Design of High-Performance CMOS Level Converters Considering PVT Variations
Jinn-Shyan WANG Yu-Juey CHANG Chingwei YEH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/05/01
Vol. E94-C  No. 5 ; pp. 913-916
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
level convertervoltage scalingdual-VDDPVT variations
 Summary | Full Text:PDF(897.6KB)

Heuristic Sizing Methodology for Designing High-Performance CMOS Level Converters with Balanced Rise and Fall Delays
Jinn-Shyan WANG Yu-Juey CHANG Chingwei YEH 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/10/01
Vol. E93-C  No. 10 ; pp. 1540-1543
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
level convertervoltage scalinghigh performance
 Summary | Full Text:PDF(525.1KB)

CMOS Level Converter with Balanced Rise and Fall Delays
Min-su KIM Young-Hyun JUN Sung-Bae PARK Bai-Sun KONG 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/01/01
Vol. E90-C  No. 1 ; pp. 192-195
Type of Manuscript:  LETTER
Category: Electronic Circuits
Keyword: 
level convertervoltage scalingclocklow power
 Summary | Full Text:PDF(1.4MB)

Multiplier Energy Reduction by Dynamic Voltage Variation
Vasily G. MOSHNYAGA Tomoyuki YAMANAKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3548-3553
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: VLSI Circuit
Keyword: 
multiplierenergy reductiondesign techniquesvoltage scaling
 Summary | Full Text:PDF(683.2KB)

Issue Queue Energy Reduction through Dynamic Voltage Scaling
Vasily G. MOSHNYAGA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2 ; pp. 272-278
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: Low-Power Technologies
Keyword: 
issue queuecomputer architecturelow powervoltage scaling
 Summary | Full Text:PDF(365KB)