Keyword : topological optimization


Synthesis Method of All Low-Voltage CMOS Instantaneous-Companding Log Domain Integrators
Ippei AKITA Kazuyuki WADA Yoshiaki TADOKORO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/02/01
Vol. E90-A  No. 2 ; pp. 339-350
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
low-supply voltageintegratorsinstantaneous compandinglog domaintopological optimization
 Summary | Full Text:PDF(484.2KB)

Automated Design of Analog Circuits Using a Cell-Based Structure
Hajime SHIBATA Soji MORI Nobuo FUJII 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/02/01
Vol. E86-A  No. 2 ; pp. 364-370
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog circuit synthesisdesign automationtopological optimizationgenetic algorithm
 Summary | Full Text:PDF(850.5KB)

Analog Circuit Synthesis Based on Reuse of Topological Features of Prototype Circuits
Hajime SHIBATA Nobuo FUJII 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11 ; pp. 2778-2784
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Analog Design
Keyword: 
analog circuit synthesisdesign automationtopological optimizationgenetic algorithm
 Summary | Full Text:PDF(546.8KB)