Keyword : temporal logic


A Model Checking Method of Soundness for Workflow Nets
Munenori YAMAGUCHI Shingo YAMAGUCHI Minoru TANAKA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/11/01
Vol. E92-A  No. 11 ; pp. 2723-2731
Type of Manuscript:  Special Section PAPER (Special Section on Theory of Concurrent Systems and its Applications)
Category: 
Keyword: 
model checkingtemporal logicworkflow netsasymmetric choiceWoflan
 Summary | Full Text:PDF(461.1KB)

A Tableau Construction Approach to Control Synthesis of FSMs Using Simulation Relations
Yoshisato SAKAI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/04/01
Vol. E90-A  No. 4 ; pp. 836-846
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 19th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
temporal logictableaucontrol synthesissimulation relation
 Summary | Full Text:PDF(239.8KB)

ASADAL/PROVER: A Toolset for Verifying Temporal Properties of Real-Time System Specifications in Statechart
Kwang-Il KO Kyo C. KANG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/02/25
Vol. E82-D  No. 2 ; pp. 398-411
Type of Manuscript:  PAPER
Category: Sofware System
Keyword: 
requirement engineeringCASEStatecharttemporal logictemporal property verification techniques
 Summary | Full Text:PDF(674.3KB)

New Generation Database Technologies for Collaborative Work Support and Spatio-Temporal Data Management
Yoshifumi MASUNAGA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/01/25
Vol. E82-D  No. 1 ; pp. 45-53
Type of Manuscript:  REVIEW PAPER
Category: 
Keyword: 
new generation databasecollaborative work supportCSCWvirtual realityspatio-temporal databaseGISspatio-temporal indextemporal logicviewmultimedia databaseVRMLWWWinternetobject-oriented database
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A Topological Framework of Stepwise Specification for Concurrent Systems
Toshihiko ANDO Kaoru TAKAHASHI Yasushi KATO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1996/11/25
Vol. E79-A  No. 11 ; pp. 1760-1767
Type of Manuscript:  Special Section PAPER (Special Section on Description Models for Concurrent Systems and Their Applications)
Category: 
Keyword: 
stepwise specificationconcurrent systemtopologyabstract level of description techniquetemporal logic
 Summary | Full Text:PDF(571.1KB)

A Statically Typed, Temporal Object-Oriented Database Technology
Suad ALAGI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/11/25
Vol. E78-D  No. 11 ; pp. 1469-1476
Type of Manuscript:  Special Section PAPER (Special Issue on Advanced Database Technologies)
Category: Model
Keyword: 
object-orientedtype technologytemporal logicreflection
 Summary | Full Text:PDF(676.8KB)

Temporal Verification of Real-Time Systems
Sérgio V. CAMPOS Edmund M. CLARKE Wilfredo MARRERO Marius MINEA Hiromi HIRAISHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/07/25
Vol. E78-D  No. 7 ; pp. 796-801
Type of Manuscript:  Special Section PAPER (Special Issue on Verification, Test and Diagnosis of VLSI Systems)
Category: 
Keyword: 
formal verificationreal-time systemtemporal logic
 Summary | Full Text:PDF(633KB)

An Application of Regular Temporal Logic to Verification of Fail-Safeness of a Comparator for Redundant System
Kazuo KAWAKUBO Hiromi HIRAISHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1993/07/25
Vol. E76-D  No. 7 ; pp. 763-770
Type of Manuscript:  Special Section PAPER (Special Issue on VLSI Testing and Testable Design)
Category: 
Keyword: 
fail-safefault toleranceformal verificationtemporal logic
 Summary | Full Text:PDF(717.1KB)

An Acyclic Expansion-Based Protocol Verification for Communications Software
Hironori SAITO Yoshiaki KAKUDA Toru HASEGAWA Tohru KIKUNO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1992/10/25
Vol. E75-B  No. 10 ; pp. 998-1007
Type of Manuscript:  Special Section PAPER (Special Issue on Communication Software Technologies)
Category: 
Keyword: 
communications softwarecommunication protocolprotocol verificationfinite state machineacyclic expansion algorithmtemporal logic
 Summary | Full Text:PDF(905.4KB)

A Petri-Net-Based Programming Environment and Its Design Methodology for Cooperating Discrete Event Systems
Naoshi UCHIHIRA Mikako ARAMI Shinichi HONIDEN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/10/25
Vol. E75-A  No. 10 ; pp. 1335-1347
Type of Manuscript:  Special Section PAPER (Special Section on Application of Petri Nets to Concurrent System Design)
Category: 
Keyword: 
high level petri netcooperating discrete event systemconcurrent programdesign methodologyprogram synthesisprogram verificationtemporal logicprogramming environment
 Summary | Full Text:PDF(972.7KB)

Net-Oriented Analysis and Design
Shinichi HONIDEN Naoshi UCHIHIRA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/10/25
Vol. E75-A  No. 10 ; pp. 1317-1325
Type of Manuscript:  INVITED PAPER (Special Section on Application of Petri Nets to Concurrent System Design)
Category: 
Keyword: 
petri netsstate transition didgramdata flow diagramalgebraic specificationtemporal logicobject-oriented analysis and designCASE
 Summary | Full Text:PDF(709.8KB)

Formal Design Verification of Sequential Machines Based on Symbolic Model Checking for Branching Time Regular Temporal Logic
Kiyoharu HAMAGUCHI Hiromi HIRAISHI Shuzo YAJIMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/10/25
Vol. E75-A  No. 10 ; pp. 1220-1229
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
design verificationsequential machinestemporal logicmodel checkingbinary decision diagram
 Summary | Full Text:PDF(786KB)

Compositional Synthesis for Cooperating Discrete Event Systems from Modular Temporal Logic Specifications
Naoshi UCHIHIRA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/03/25
Vol. E75-A  No. 3 ; pp. 380-391
Type of Manuscript:  Special Section PAPER (Special Section on the 4th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
cooperating discrete event systemtemporal logiccompositional program synthesisstate explosion problem
 Summary | Full Text:PDF(690.8KB)

A Study of Aspect Calculus
Kazuo HASHIMOTO Tohru ASAMI Seiichi YAMAMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/03/25
Vol. E75-A  No. 3 ; pp. 436-450
Type of Manuscript:  PAPER
Category: Foundations of Artificial Intelligence and Knowledge Processing
Keyword: 
aspecttensetemporal logicformal semantics
 Summary | Full Text:PDF(1013.9KB)