Keyword : system on chip


An 18 µW Spur Cancelled Clock Generator for Recovering Receiver Sensitivity in Wireless SoCs
Yosuke OGASAWARA Ryuichi FUJIMOTO Tsuneo SUZUKI Kenichi SAMI 
Publication:   
Publication Date: 2017/06/01
Vol. E100-C  No. 6 ; pp. 529-538
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Their Application Technologies)
Category: 
Keyword: 
spurclock spurSCCGSSCGBLEsensitivity recoveryclock generationsystem on chip
 Summary | Full Text:PDF(2.9MB)

60 GHz Millimeter-Wave CMOS Integrated On-Chip Open Loop Resonator Bandpass Filters on Patterned Ground Shields
Ramesh K. POKHAREL Xin LIU Dayang A.A. MAT Ruibing DONG Haruichi KANAYA Keiji YOSHIDA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/02/01
Vol. E96-C  No. 2 ; pp. 270-276
Type of Manuscript:  PAPER
Category: Microwaves, Millimeter-Waves
Keyword: 
millimeter-waveon-chip band pass filterpattern ground shieldsfolded structuresystem on chip
 Summary | Full Text:PDF(2.4MB)

Power Minimization for Dual- and Triple-Supply Digital Circuits via Integer Linear Programming
Ki-Yong AHN Chong-Min KYUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/09/01
Vol. E92-A  No. 9 ; pp. 2318-2325
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
system on chiplow power designpartitioninginteger linear programming
 Summary | Full Text:PDF(380.5KB)

A Study of Sense-Voltage Margins in Low-Voltage-Operating Embedded DRAM Macros
Akira YAMAZAKI Fukashi MORISHITA Naoya WATANABE Teruhiko AMANO Masaru HARAGUCHI Hideyuki NODA Atsushi HACHISUKA Katsumi DOSAKA Kazutami ARIMOTO Setsuo WAKE Hideyuki OZAKI Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/10/01
Vol. E88-C  No. 10 ; pp. 2020-2027
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
embedded memoryDRAMvoltage marginlow voltagesystem on chip
 Summary | Full Text:PDF(908.3KB)

Efficient Block-Level Connectivity Verification Algorithms for Embedded Memories
Jin-Fu LI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2004/12/01
Vol. E87-A  No. 12 ; pp. 3185-3192
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Test
Keyword: 
system on chipembedded memoriesverificationsignal misplaced fault
 Summary | Full Text:PDF(446KB)

A Low Power Embedded DRAM Macro for Battery-Operated LSIs
Takeshi FUJINO Akira YAMAZAKI Yasuhiko TAITO Mitsuya KINOSHITA Fukashi MORISHITA Teruhiko AMANO Masaru HARAGUCHI Makoto HATAKENAKA Atsushi AMO Atsushi HACHISUKA Kazutami ARIMOTO Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/12/01
Vol. E86-A  No. 12 ; pp. 2991-3000
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Power Optimization
Keyword: 
embedded memoryDRAMlow powersystem on chip
 Summary | Full Text:PDF(2.9MB)

A 0.18 µm 32 Mb Embedded DRAM Macro for 3-D Graphics Controller
Akira YAMAZAKI Takeshi FUJINO Kazunari INOUE Isamu HAYASHI Hideyuki NODA Naoya WATANABE Fukashi MORISHITA Katsumi DOSAKA Yoshikazu MOROOKA Shinya SOEDA Kazutami ARIMOTO Setsuo WAKE Kazuyasu FUJISHIMA Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/09/01
Vol. E85-C  No. 9 ; pp. 1697-1708
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
embedded DRAMsystem on chip3-D graphics concurrent operation
 Summary | Full Text:PDF(2.2MB)

Large Scale Embedded DRAM Technology
Akira YAMAZAKI Tadato YAMAGATA Yutaka ARITA Makoto TANIGUCHI Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/25
Vol. E81-C  No. 5 ; pp. 750-758
Type of Manuscript:  INVITED PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: DRAM
Keyword: 
embedded DRAMsystem on chipsystem LSI
 Summary | Full Text:PDF(855.7KB)

Embedded System Cost Optimization via Data Path Width Adjustment
Barry SHACKLEFORD Mitsuhiro YASUDA Etsuko OKUSHI Hisao KOIZUMI Hiroyuki TOMIYAMA Akihiko INOUE Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/10/25
Vol. E80-D  No. 10 ; pp. 974-981
Type of Manuscript:  Special Section PAPER (Special Issue on Synthesis and Verification of Hardware Design)
Category: High Level Synthesis
Keyword: 
embedded systemssystem on chipCPUmemory
 Summary | Full Text:PDF(757.2KB)

Integration of a Power Supply for System-on-Chip
Satoshi MATSUMOTO Masato MINO Toshiaki YACHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/02/25
Vol. E80-A  No. 2 ; pp. 276-282
Type of Manuscript:  INVITED PAPER (Special Section on Analog Circuit Techniques for System-on-Chip Integration)
Category: 
Keyword: 
power supplysystem on chippower ICSOIthin-film magnetic device
 Summary | Full Text:PDF(544.2KB)