Keyword : system LSI


Study of Pattern Area Reduction for System LSI with FinFET and Stacked FinFET
Yuki FUKUDA Yu HIROSHIMA Shigeyoshi WATANABE 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2010/03/01
Vol. J93-C  No. 3 ; pp. 98-99
Type of Manuscript:  LETTER
Category: 
Keyword: 
FinFETstacked FinFETsystem LSIdesign rulepattern area
 Summary | Full Text(in Japanese):PDF(190.1KB)

Study of Pattern Area Reduction for System LSI with SGT and Stacked SGT
Takahiro KODAMA Shigeyoshi WATANABE 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2010/01/01
Vol. J93-C  No. 1 ; pp. 33-34
Type of Manuscript:  LETTER
Category: 
Keyword: 
SGTstacked SGTsystem LSIdesign rulepattern area
 Summary | Full Text(in Japanese):PDF(415.5KB)

New Design Technology of Independent-Gate Controlled Stacked Type 3D Transistor for System LSI
Yu HIROSHIMA Shigeyoshi WATANABE 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2009/03/01
Vol. J92-C  No. 3 ; pp. 94-103
Type of Manuscript:  PAPER
Category: 
Keyword: 
independent-gate controlled double-gate transistorstacked type 3D transistorFinFETlogic circuitsystem LSI
 Summary | Full Text(in Japanese):PDF(763.7KB)

New Design Technology of Independent-Gate Controlled Double-Gate Transistor for System LSI
Yu HIROSHIMA Shigeyoshi WATANABE 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2009/01/01
Vol. J92-C  No. 1 ; pp. 18-25
Type of Manuscript:  PAPER
Category: 
Keyword: 
independent-gate controlled double-gate transistorFinFETsystem LSI
 Summary | Full Text(in Japanese):PDF(563.7KB)

Evaluation of an Interposer Embedded Capacitors for a System LSI
Yoshiyuki SAITO Eiji TAKAHASHI Chie SASAKI Yasuhiro SUGAYA 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2008/11/01
Vol. J91-C  No. 11 ; pp. 569-576
Type of Manuscript:  Special Section PAPER (Special Issue on Leading-Edge Trend of Advanced Packages for Electron Devices and Its Related Topics for High-Density Packaging Process Technologies)
Category: 
Keyword: 
embedded passive componentsystem LSIbypass capacitorelectric characteristic
 Summary | Full Text(in Japanese):PDF(1012.1KB)

Design Method for Low-Power Dual-Supply-Voltage System LSI with Leakage Current
Shigeyoshi WATANABE 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2008/10/01
Vol. J91-C  No. 10 ; pp. 500-502
Type of Manuscript:  LETTER
Category: 
Keyword: 
system LSIdual-supply-voltage schemepower consumptiondynamic powerleakage current
 Summary | Full Text(in Japanese):PDF(350.8KB)

A Tactile Sensor with Distributed Over-Sampling AD Conversion Based on Equal Potential Method
Atsushi IWASHITA Makoto SHIMOJO Masatoshi ISHIKAWA 
Publication:   C - Abstracts of IEICE TRANSACTIONS on Electronics (Japanese Edition)
Publication Date: 2007/10/01
Vol. J90-C  No. 10 ; pp. 683-692
Type of Manuscript:  PAPER
Category: 
Keyword: 
tactile sensorsystem LSIAD converterover sampling
 Summary | Full Text(in Japanese):PDF(680.8KB)