Keyword : system LSI

An Integrated Platform for Digital Consumer Electronics
Junji MICHIYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/10/01
Vol. E92-C  No. 10  pp. 1240-1248
Type of Manuscript: Special Section PAPER (Special Section on Hardware and Software Technologies on Advanced Microprocessors)
Category: INVITED
Keyword: 
platform,  system LSI,  consumer electronics,  video codec, 
  Summary |  Full Text:PDF (2.3MB)
Shared Write-Selection Transistor Cell and Leakage-Replication Read Scheme for Large Capacity MRAM Macros
Ryusuke NEBASHI  Noboru SAKIMURA  Tadahiko SUGIBAYASHI  Naoki KASAI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4  pp. 417-422
Type of Manuscript: Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
MRAM,  embedded memory,  SoC,  system LSI, 
  Summary |  Full Text:PDF (578.6KB)
Module-Wise Dynamic Voltage and Frequency Scaling for a 90 nm H.264/MPEG-4 Codec LSI
Yukihito OOWAKI  Shinichiro SHIRATAKE  Toshihide FUJIYOSHI  Mototsugu HAMADA  Fumitoshi HATORI  Masami MURAKATA  Masafumi TAKAHASHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2006/03/01
Vol. E89-C  No. 3  pp. 263-270
Type of Manuscript: Special Section PAPER (Special Section on VLSI Design Technology in the Sub-100 nm Era)
Category: INVITED
Keyword: 
dynamic voltage/frequency scaling,  system LSI,  H.264,  MPEG-4,  A/V codec LSI,  multimedia chip, 
  Summary |  Full Text:PDF (944.1KB)
Mixed Signal SoC Era
Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/06/01
Vol. E87-C  No. 6  pp. 867-877
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit and Device Technologies)
Category: INVITED
Keyword: 
CMOS,  LSI,  system LSI,  mixed signal technology,  analog circuit,  LSI design,  analog device, 
  Summary |  Full Text:PDF (1.6MB)
A Single-Chip JPEG2000 Encode Processor Capable of Compressing D1-Images at 30 frames/s without Tile Division
Hideki YAMAUCHI  Shigeyuki OKADA  Kazuhiko TAKETA  Tatsushi OHYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2004/04/01
Vol. E87-C  No. 4  pp. 448-456
Type of Manuscript: Special Section PAPER (Special Section on Low-Power System LSI, IP and Related Technologies)
Category: 
Keyword: 
JPEG2000,  wavelet,  system LSI,  image compression,  multimedia, 
  Summary |  Full Text:PDF (700.4KB)
Towards the System LSI Design Technology
Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/01/01
Vol. E84-A  No. 1  pp. 91-97
Type of Manuscript: INVITED PAPER (Special Section on the 10th Anniversary of the IEICE Transactions of Fundamentals: "Last Decade and 21st Century")
Category: 
Keyword: 
system LSI,  system on a chip,  embedded system,  soft-core processor, 
  Summary |  Full Text:PDF (379.4KB)
Evaluating DRAM Refresh Architectures for Merged DRAM/Logic LSIs
Taku OHSAWA  Koji KAI  Kazuaki MURAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/09/20
Vol. E81-C  No. 9  pp. 1455-1462
Type of Manuscript: Special Section PAPER (Special Issue on Novel VLSI Processor Architectures)
Category: 
Keyword: 
DRAM,  DRAM refresh,  merged DRAM/logic,  system LSI,  low power, 
  Summary |  Full Text:PDF (740.9KB)
Large Scale Embedded DRAM Technology
Akira YAMAZAKI  Tadato YAMAGATA  Yutaka ARITA  Makoto TANIGUCHI  Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1998/05/20
Vol. E81-C  No. 5  pp. 750-758
Type of Manuscript: INVITED PAPER (Special Issue on Multimedia, Network, and DRAM LSIs)
Category: DRAM
Keyword: 
embedded DRAM,  system on chip,  system LSI, 
  Summary |  Full Text:PDF (857.6KB)