Keyword : standard cell


Low Power High Performance FinFET Standard Cells Based on Mixed Back Biasing Technology
Tian WANG Xiaoxin CUI Kai LIAO Nan LIAO Xiaole CUI Dunshan YU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/08/01
Vol. E99-C  No. 8 ; pp. 974-983
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
VLSIFinFETstandard cellstackingback biasing
 Summary | Full Text:PDF(4MB)

A 0.0055mm2 480µW Fully Synthesizable PLL Using Stochastic TDC in 28nm FDSOI
Dongsheng YANG Tomohiro UENO Wei DENG Yuki TERASHIMA Kengo NAKATA Aravind Tharayil NARAYANAN Rui WU Kenichi OKADA Akira MATSUZAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2016/06/01
Vol. E99-C  No. 6 ; pp. 632-640
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
AD-PLLsynthesizablestochastic TDCstandard cellautomatic place-and-route
 Summary | Full Text:PDF(2MB)

A Standard-Cell Based On-Chip NMOS and PMOS Performance Monitor for Process Variability Compensation
Toshiyuki YAMAGISHI Tatsuo SHIOZAWA Koji HORISAKI Hiroyuki HARA Yasuo UNEKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/06/01
Vol. E96-C  No. 6 ; pp. 894-902
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuits and Related SoC Integration Technologies)
Category: 
Keyword: 
on chipmonitordigitalprocess variabilitystandard cellarea efficiency
 Summary | Full Text:PDF(3.7MB)

Low-Leakage and Low-Power Implementation of High-Speed Logic Gates
Tsung-Yi WU Liang-Ying LU 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2009/04/01
Vol. E92-C  No. 4 ; pp. 401-408
Type of Manuscript:  Special Section PAPER (Special Section on Low-Leakage, Low-Voltage, Low-Power and High-Speed Technologies for System LSIs in Deep-Submicron Era)
Category: 
Keyword: 
dual value logicleakage currentpass-transistor logic gatestandard celltransmission gate
 Summary | Full Text:PDF(1.4MB)

Manufacturability-Aware Design of Standard Cells
Hirokazu MUTA Hidetoshi ONODERA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/12/01
Vol. E90-A  No. 12 ; pp. 2682-2690
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Physical Design
Keyword: 
manufacturabilityvariabilityDFMACLVstandard cellOPCRET
 Summary | Full Text:PDF(546.5KB)

Navigating Register Placement for Low Power Clock Network Design
Yongqiang LU Chin-Ngai SZE Xianlong HONG Qiang ZHOU Yici CAI Liang HUANG Jiang HU 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3405-3411
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Floorplan and Placement
Keyword: 
clock networkstandard cellquadratic placementprescribed skew
 Summary | Full Text:PDF(528KB)

Design of Small RSFQ Microprocessor Based on Cell-Based Top-Down Design Methodology
Futabako MATSUZAKI Kenichi YODA Junichi KOSHIYAMA Kei MOTOORI Nobuyuki YOSHIKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/03/01
Vol. E85-C  No. 3 ; pp. 659-664
Type of Manuscript:  Special Section PAPER (Special Issue on Superconductive Electronics)
Category: Digital Devices and Their Applications
Keyword: 
SFQBDDsuperconducting circuitmicroprocessorstandard cell
 Summary | Full Text:PDF(711.2KB)

Analog Standard Cells for A-D and D-A Converters with Δ-Σ Modulators
Takao KANEKO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/02/25
Vol. E83-A  No. 2 ; pp. 252-260
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
analog layoutmixed analog-digital LSIstandard cellΔ-Σ type A-D converterΔ-Σ type D-A converter
 Summary | Full Text:PDF(1.8MB)

A CAD-Based Low-Power Design Methodology for Very High-Speed Si Bipolar Standard Cell LSIs
Keiichi KOIKE Kenji KAWAI Akira ONOZAWA Yuichiro TAKEI Yoshiji KOBAYASHI Haruhiko ICHINO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/12/25
Vol. E80-C  No. 12 ; pp. 1578-1585
Type of Manuscript:  Special Section PAPER (Special Issue on Low-Power and High-Speed LSI Technologies)
Category: 
Keyword: 
Si bipolarECLstandard cellCADSDH
 Summary | Full Text:PDF(659.1KB)

An Asynchronous Cell Library for Self-Timed System Designs
Yuk-Wah PANG Wing-yun SIT Chiu-sing CHOY Cheong-fat CHAN Wai-kuen CHAM 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/03/25
Vol. E80-D  No. 3 ; pp. 296-307
Type of Manuscript:  Special Section PAPER (Special Issue on Asynchronous Circuit and System Design)
Category: Design
Keyword: 
self-timed logicasynchronous designstandard cellVLSI
 Summary | Full Text:PDF(1008KB)

1.4 GHz Natural Air-Cooling GaAs Standard Cell LSIs for 10 Gbit/s Optical Communication Systems
Yasunori OGAWA Kuniichi IKEMURA Shouhei SEKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/04/25
Vol. E79-C  No. 4 ; pp. 489-495
Type of Manuscript:  Special Section PAPER (Special Issue on Ultra-High-Speed LSIs)
Category: 
Keyword: 
GaAsDCFLSDHstandard cellnatural air-cooling
 Summary | Full Text:PDF(722.1KB)

High Speed GaAs Digital Integrated Circuits
Masahiro AKIYAMA Seiji NISHI Yasushi KAWAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1995/09/25
Vol. E78-C  No. 9 ; pp. 1165-1170
Type of Manuscript:  INVITED PAPER (Special Issue on Ultra-High-Speed Electron Devices)
Category: 
Keyword: 
GaAs digital ICDCFLSBFLhigh speedlow powerself-alignment processrecessed gate processcircuit designstandard cell
 Summary | Full Text:PDF(534.1KB)

Cell Designer: An Automatic Placement and Routing Tool for the Mixed Design of Macro and Standard Cells
Young Seok BAEK Byoung Yoon CHEON Kyung Sik KIM Hyun Chan LEE Chul Dong LEE 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/02/25
Vol. E75-A  No. 2 ; pp. 224-232
Type of Manuscript:  PAPER
Category: Computer Aided Design (CAD)
Keyword: 
VLSI/CADlayoutplacementroutingmacro cellstandard cell
 Summary | Full Text:PDF(632.4KB)