Keyword : single event upset


Error Propagation Analysis for Single Event Upset considering Masking Effects on Re-Convergent Path
Go MATSUKAWA Yuta KIMI Shuhei YOSHIDA Shintaro IZUMI Hiroshi KAWAGUCHI Masahiko YOSHIMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/06/01
Vol. E99-A  No. 6 ; pp. 1198-1205
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
single event effectsingle event upsetsoft error propagationlogical maskingtemporal masking
 Summary | Full Text:PDF(1.7MB)

A Self-Recoverable, Frequency-Aware and Cost-Effective Robust Latch Design for Nanoscale CMOS Technology
Aibin YAN Huaguo LIANG Zhengfeng HUANG Cuiyun JIANG Maoxiang YI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2015/12/01
Vol. E98-C  No. 12 ; pp. 1171-1178
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
transient faultsingle event upsetsoft errorradiation hardeningcircuit reliability
 Summary | Full Text:PDF(1.7MB)

Self Synchronous Circuits for Robust Operation in Low Voltage and Soft Error Prone Environments
Benjamin DEVLIN Makoto IKEDA Kunihiro ASADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4 ; pp. 518-527
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
self synchronousgate-levelrobustnesssingle event upsetlow voltagereliability
 Summary | Full Text:PDF(6.1MB)

A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis
Takashi IMAGAWA Hiroshi TSUTSUI Hiroyuki OCHI Takashi SATO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4 ; pp. 454-462
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
soft errorsingle event upsettriple modular redundancyreliabilitysimulated annealing
 Summary | Full Text:PDF(1.4MB)

DFV-Aware Flip-Flops Using C-Elements
Changnoh YOON Youngmin CHO Jinsang KIM 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/07/01
Vol. E94-C  No. 7 ; pp. 1229-1232
Type of Manuscript:  BRIEF PAPER
Category: Electronic Circuits
Keyword: 
design-for-variabilityflip-flopnanometer processPVT variationsingle event upset
 Summary | Full Text:PDF(577KB)

On Synthesizing a Reliable Multiprocessor for Embedded Systems
Makoto SUGIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2560-2569
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: High-Level Synthesis and System-Level Design
Keyword: 
heterogeneous multiprocessor synthesissoft errorsingle event upsetreliabilityreal-time system
 Summary | Full Text:PDF(506.4KB)

Reliability Inherent in Heterogeneous Multiprocessor Systems and Task Scheduling for Ameliorating Their Reliability
Makoto SUGIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/04/01
Vol. E92-A  No. 4 ; pp. 1121-1128
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies Emerging Mainly from the 21st Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
soft errorsingle event upsetreliabilitytask schedulingheterogeneous multiprocessor systems
 Summary | Full Text:PDF(337.4KB)

Reliable Cache Architectures and Task Scheduling for Multiprocessor Systems
Makoto SUGIHARA Tohru ISHIHARA Kazuaki MURAKAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2008/04/01
Vol. E91-C  No. 4 ; pp. 410-417
Type of Manuscript:  Special Section PAPER (Special Section on Advanced Technologies in Digital LSIs and Memories)
Category: 
Keyword: 
single event upsetSRAMDRAMreliabilitycache architecturetask scheduling
 Summary | Full Text:PDF(558.2KB)

Temperature Dependence of Single Event Charge Collection in SOI MOSFETs by Simulation Approach
Tsukasa OOOKA Hideyuki IWATA Takashi OHZONE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/03/25
Vol. E80-C  No. 3 ; pp. 417-422
Type of Manuscript:  Special Section PAPER (Special Issue on SOI Devices and Their Process Technologies)
Category: 
Keyword: 
SOI MOSFETsnumerical simulationtemperature dependencesingle event upsetsoft errors
 Summary | Full Text:PDF(423.1KB)