IEICE SEARCH SYSTEM

Keyword : simulated annealing

A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis Takashi IMAGAWA Hiroshi TSUTSUI Hiroyuki OCHI Takashi SATO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 2013/04/01 Vol. E96-C No. 4 pp. 454-462 Type of Manuscript: Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology) Category: Keyword: soft error, single event upset, triple modular redundancy, reliability, simulated annealing,
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A Family-Based Evolutional Approach for Kernel Tree Selection in SVMs Ithipan METHASATE Thanaruk THEERAMUNKONG
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2010/04/01 Vol. E93-D No. 4 pp. 909-921 Type of Manuscript: PAPER Category: Biocybernetics, Neurocomputing Keyword: support vector machines, multifunction kernel, kernel tree, optimal search, simulated annealing,
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A Low-Complexity Antenna Selection Scheme in MIMO Systems Jung-Chieh CHEN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2010/03/01 Vol. E93-A No. 3 pp. 651-655 Type of Manuscript: LETTER Category: Communication Theory and Signals Keyword: multiple-input multiple-output, antenna selection, simulated annealing,
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Fuzzy Entropy Based Fuzzy c-Means Clustering with Deterministic and Simulated Annealing Methods Makoto YASUDA Takeshi FURUHASHI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2009/06/01 Vol. E92-D No. 6 pp. 1232-1239 Type of Manuscript: PAPER Category: Computation and Computational Models Keyword: fuzzy c-means clustering, fuzzy entropy, Fermi-Dirac distribution, deterministic annealing, simulated annealing,
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An Estimation Method of Parameters for Closed-box Loudspeaker System Rika NAKAO Yoshinobu KAJIKAWA Yasuo NOMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2008/10/01 Vol. E91-A No. 10 pp. 3006-3013 Type of Manuscript: PAPER Category: Engineering Acoustics Keyword: Mirror filter, nonlinear distortion, simulated annealing, compensating distortion,
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Optimization for Optical Network Designs Based on Existing Power Grids Areeyata SRIPETCH Poompat SAENGUDOMLERT
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2008/03/01 Vol. E91-B No. 3 pp. 689-699 Type of Manuscript: PAPER Category: Optical Fiber for Communications Keyword: physical topology design, routing and wavelength assignment, optical amplifier placement, integer linear programming, simulated annealing,
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A Relocation Method for Circuit Modifications Kunihiko YANAGIBASHI Yasuhiro TAKASHIMA Yuichi NAKAMURA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2007/12/01 Vol. E90-A No. 12 pp. 2743-2751 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Circuit Synthesis Keyword: non full-reverse-order constraint, circuit modification, relocation, sequence-pair, simulated annealing,
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Multi-Point Simulated Annealing with Adaptive Neighborhood Keiko ANDO Mitsunori MIKI Tomoyuki HIROYASU
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2007/02/01 Vol. E90-D No. 2 pp. 457-464 Type of Manuscript: Special Section PAPER (Special Section on Foundations of Computer Science) Category: Optimizing Algorithms Keyword: optimizing algorithm, simulated annealing, adaptive neighborhood, continuous optimization problem,
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A Two-Stage Simulated Annealing Logical Topology Reconfiguration in IP over WDM Networks Sugang XU Kaoru SEZAKI Yoshiaki TANAKA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2005/06/01 Vol. E88-B No. 6 pp. 2483-2494 Type of Manuscript: PAPER Category: Internet Keyword: IP over WDM network, logical topology reconfiguration, simulated annealing,
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Anycast Routing Problem on WDM Ring Network Der-Rong DIN
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2005/04/01 Vol. E88-B No. 4 pp. 1347-1354 Type of Manuscript: Special Section PAPER (Special Section on Internet Technology V) Category: Keyword: anycast routing, NP-hard, WDM ring, heuristic algorithm, simulated annealing,
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Hybrid Method for Solving Dual-Homing Cell Assignment Problem on Two-Level Wireless ATM Network Der-Rong DIN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2004/07/01 Vol. E87-A No. 7 pp. 1664-1671 Type of Manuscript: Special Section PAPER (Special Section on Multi-dimensional Mobile Information Networks) Category: Network Theory Keyword: NP-hard, wireless ATM, cell assignment, dual-homing, simulated annealing, heuristic algorithm,
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A Performance-Driven Floorplanning Method with Interconnect Performance Estimation Shinya YAMASAKI Shingo NAKAYA Shin'ichi WAKABAYASHI Tetsushi KOIDE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/12/01 Vol. E85-A No. 12 pp. 2775-2784 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Physical Design Keyword: floorplanning, timing-driven layout, buffer insertion, wire sizing, simulated annealing,
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Optimal Access Point Placement in Simultaneous Broadcast OFDM for Public Access Wireless LAN Mari KOBAYASHI Shinichiro HARUYAMA Ryuji KOHNO Masao NAKAGAWA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 2002/10/01 Vol. E85-B No. 10 pp. 1978-1986 Type of Manuscript: Special Section PAPER (Special Issue on Mobile Multimedia Communications) Category: Keyword: access point, OFDM, simulated annealing, wireless LAN,
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A New Method of Designing a Dither Matrix Yoshito ABE
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/07/01 Vol. E85-A No. 7 pp. 1702-1709 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: digital halftoning, simulated annealing, dither matrix, press printing,
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A Boltzmann Machine with Non-rejective Move Hongbing ZHU Ningping SUN Mamoru SASAKI Kei EGUCHI Toru TABATA Fuji REN
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2002/06/01 Vol. E85-A No. 6 pp. 1229-1235 Type of Manuscript: Special Section PAPER (Special Section on Papers Selected from 2001 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC 2001)) Category: Keyword: Boltzmann machine, neurons' state move, rejection of state move, simulated annealing, movement probability,
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VLSI Floorplanning with Boundary Constraints Using Corner Block List Representation Yuchun MA Xianlong HONG Sheqin DONG Yici CAI Chung-Kuan CHENG Jun GU
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2001/11/01 Vol. E84-A No. 11 pp. 2697-2704 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Layout Keyword: floorplan, corner block list, simulated annealing, boundary constraints,
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WSSA: A High Performance Simulated Annealing and Its Application to Transistor Placement Shunji SAIKA Masahiro FUKUI Masahiko TOYONAGA Toshiro AKINO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/12/20 Vol. E83-A No. 12 pp. 2584-2591 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Layout Synthesis Keyword: simulated annealing, temperature scheduling, phase transition, placement optimization, cell synthesis,
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The 3D-Packing by Meta Data Structure and Packing Heuristics Hiroyuki YAMAZAKI Keishi SAKANUSHI Shigetoshi NAKATAKE Yoji KAJITANI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/04/20 Vol. E83-A No. 4 pp. 639-645 Type of Manuscript: Special Section PAPER (Special Section on Discrete Mathematics and Its Applications) Category: Keyword: 3D-packing, placement, sequence-pair, sequence-triple, simulated annealing,
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A Fast Kinoform Optimization Algorithm Based on Simulated Annealing Yen-Wei CHEN Shinichiro YAMAUCHI Ning WANG Zensho NAKAO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/04/20 Vol. E83-A No. 4 pp. 774-776 Type of Manuscript: LETTER Category: Image Keyword: kinoform, computer generated holography, optimization, simulated annealing,
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Annealed Hopfield Neural Network with Moment and Entropy Constraints for Magnetic Resonance Image Classification Jzau-Sheng LIN
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 2000/01/20 Vol. E83-D No. 1 pp. 100-108 Type of Manuscript: PAPER Category: Biocybernetics, Neurocomputing Keyword: simulated annealing, mean field annealing, annealed Hopfield neural network, magnetic resonance image,
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Fast, Robust Block Motion Estimation Using Simulated Annealing Mon-Chau SHIE Wen-Hsien FANG Kuo-Jui HUNG Feipei LAI
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 2000/01/20 Vol. E83-A No. 1 pp. 121-127 Type of Manuscript: PAPER Category: Digital Signal Processing Keyword: blocking motion estimation, simulated annealing, video coding,
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A Two-Stage Discrete Optimization Method for Largest Common Subgraph Problems Nobuo FUNABIKI Junji KITAMICHI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1999/08/20 Vol. E82-D No. 8 pp. 1145-1153 Type of Manuscript: PAPER Category: Algorithm and Computational Complexity Keyword: common subgraph, isomorphic, NP-complete, greedy method, discrete descent method, simulated annealing,
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Pattern-Based Maximal Power Estimation for VLSI Chip Design Wang-Jin CHEN Wu-Shiung FENG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/11/20 Vol. E80-A No. 11 pp. 2300-2307 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: maximal power dissipation, simulated annealing, walk through, power estimation, power optimization,
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SAPICE: A Design Tool of CMOS Operational Amplifiers Sang-Dae YU Chong-Min KYUNG
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1997/09/20 Vol. E80-A No. 9 pp. 1667-1675 Type of Manuscript: PAPER Category: VLSI Design Technology and CAD Keyword: operational amplifier design, simulated annealing, circuit optimization.,
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Effects of Simulated Annealing in the Resonant-Tunneling Resistive-Fuse Network for Early Vision Koichi MAEZAWA
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1996/11/20 Vol. E79-C No. 11 pp. 1543-1549 Type of Manuscript: Special Section PAPER (Special Issue on Quantum Effect Devices and Their Fabrication Technologies) Category: Keyword: resonant tunneling diode, simulated annealing, resistive fuse, image processing,
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A Method Quantizing Filter Coefficients with Genetic Algorithm and Simulated Annealing Miki HASEYAMA Yoshihiro AKETA Hideo KITAJIMA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/08/20 Vol. E79-A No. 8 pp. 1130-1134 Type of Manuscript: Special Section PAPER (Special Section on Digital Signal Processing) Category: Keyword: genitic algorithm, frequency characteristic, quantization, simulated annealing,
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Information Geometry of Mean Field Theory Toshiyuki TANAKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1996/05/20 Vol. E79-A No. 5 pp. 709-715 Type of Manuscript: PAPER Category: Neural Networks Keyword: neural networks, mean field theory, simulated annealing, information geometry, optimization problem.,
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An Application of Simulated Annealing to the Design of Block Coded Modulation Minoru OKADA Shinsuke HARA Shozo KOMAKI Norihiko MORINAGA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1996/01/20 Vol. E79-B No. 1 pp. 88-91 Type of Manuscript: LETTER Category: Radio Communication Keyword: coded modulation, fading, QAM, simulated annealing,
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A Pipelined Data-Path Synthesis Method Based on Simulated Annealing Xing-jian XU Mitsuru ISHIZUKA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1995/08/20 Vol. E78-A No. 8 pp. 1017-1028 Type of Manuscript: PAPER Category: Numerical Analysis and Optimization Keyword: pipeline design, pipeline scheduling, simulated annealing,
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Constraint Satisfaction Approach to Extraction of Japanese Character Regions from Unformatted Document Image Keiji GYOHTEN Noboru BABAGUCHI Tadahiro KITAHASHI
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1995/04/20 Vol. E78-D No. 4 pp. 466-475 Type of Manuscript: PAPER Category: Image Processing, Computer Graphics and Pattern Recognition Keyword: character extraction, unformatted document, bottom-up approach, constraint satisfaction, simulated annealing,
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A Multi-Layer Channel Router Using Simulated Annealing Masahiko TOYONAGA Chie IWASAKI Yoshiaki SAWADA Toshiro AKINO
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1994/12/20 Vol. E77-A No. 12 pp. 2085-2091 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: channel router, simulated annealing, layer assignment, compaction,
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The lmprovement in Performance-Driven Analog LSI Layout System LIBRA Tomohiko OHTSUKA Nobuyuki KUROSAWA Hiroaki KUNIEDA
Publication: IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences Publication Date: 1993/10/20 Vol. E76-A No. 10 pp. 1626-1635 Type of Manuscript: Special Section PAPER (Special Section on VLSI Design and CAD Algorithms) Category: Keyword: process parameter, wire parasitics, device heat, performance specification, penalty function, simulated annealing, rip-up rerouting,
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On Multiple Alignment of Genome Sequences Masanori OHYA Satoru MIYAZAKI Koji OGATA
Publication: IEICE TRANSACTIONS on Communications Publication Date: 1992/06/20 Vol. E75-B No. 6 pp. 453-457 Type of Manuscript: INVITED PAPER (Special Issue on Communication Theory) Category: Keyword: genome sequence, alignment, simulated annealing,
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LIBRA: Automatic Performance-Driven Layout for Analog LSIs Tomohiko OHTSUKA Hiroaki KUNIEDA Mineo KANEKO
Publication: IEICE TRANSACTIONS on Electronics Publication Date: 1992/03/20 Vol. E75-C No. 3 pp. 312-321 Type of Manuscript: Special Section PAPER (Special Issue on Analog LSI and Related Technology) Category: Keyword: performance-driven, process parameter, wire parasitics, performance deviation, simulated annealing, LIBRA,
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Annealing by Perturbing Synapses Shiao-Lin LIN Jiann-Ming WU Cheng-Yuan LIOU
Publication: IEICE TRANSACTIONS on Information and Systems Publication Date: 1992/03/20 Vol. E75-D No. 2 pp. 210-218 Type of Manuscript: PAPER Category: Bio-Cybernetics Keyword: bio-cybernetics, artificial intelligence and cognitive science, neural network, Hopfield model, simulated annealing, optimization,
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