Keyword : side-channel attacks


Power Analysis on Unrolled Architecture with Points-of-Interest Search and Its Application to PRINCE Block Cipher
Ville YLI-MÄYRY Naofumi HOMMA Takafumi AOKI 
Publication:   
Publication Date: 2017/01/01
Vol. E100-A  No. 1 ; pp. 149-157
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: 
Keyword: 
low latency cipherscryptographic hardwareside-channel attacksunrolled architecturespower analysis
 Summary | Full Text:PDF(2.2MB)

Evaluation Method for Access-Driven Cache Attacks Using Correlation Coefficient
Junko TAKAHASHI Toshinori FUKUNAGA Kazumaro AOKI Hitoshi FUJI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2015/01/01
Vol. E98-A  No. 1 ; pp. 192-202
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Foundation
Keyword: 
side-channel attacksaccess-driven cache attacksblock cipherssoftware implementation
 Summary | Full Text:PDF(1.8MB)

Scan-Based Side-Channel Attack on the LED Block Cipher Using Scan Signatures
Mika FUJISHIRO Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/12/01
Vol. E97-A  No. 12 ; pp. 2434-2442
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
LEDlight encryption deviceside-channel attacksscan chainscan-based attack
 Summary | Full Text:PDF(1.9MB)

Scan-Based Attack against Trivium Stream Cipher Using Scan Signatures
Mika FUJISHIRO Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/07/01
Vol. E97-A  No. 7 ; pp. 1444-1451
Type of Manuscript:  Special Section PAPER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
Triviumside-channel attacksscan chainscan-based attack
 Summary | Full Text:PDF(1.4MB)

Chosen-IV Correlation Power Analysis on KCipher-2 Hardware and a Masking-Based Countermeasure
Takafumi HIBIKI Naofumi HOMMA Yuto NAKANO Kazuhide FUKUSHIMA Shinsaku KIYOMOTO Yutaka MIYAKE Takafumi AOKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/01/01
Vol. E97-A  No. 1 ; pp. 157-166
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Symmetric Key Based Cryptography
Keyword: 
side-channel attacksKCipher-2correlation power analysisrandom masking
 Summary | Full Text:PDF(6.7MB)

Evaluation of Information Leakage from Cryptographic Hardware via Common-Mode Current
Yu-ichi HAYASHI Naofumi HOMMA Takaaki MIZUKI Takeshi SUGAWARA Yoshiki KAYANO Takafumi AOKI Shigeki MINEGISHI Akashi SATOH Hideaki SONE Hiroshi INOUE 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2012/06/01
Vol. E95-C  No. 6 ; pp. 1089-1097
Type of Manuscript:  PAPER
Category: Electronic Components
Keyword: 
information securityelectromagnetic information leakagecryptographic modulesside-channel attackscommon-mode currents
 Summary | Full Text:PDF(2.3MB)

Toward Effective Countermeasures against an Improved Fault Sensitivity Analysis
Yang LI Kazuo OHTA Kazuo SAKIYAMA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2012/01/01
Vol. E95-A  No. 1 ; pp. 234-241
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Implementation
Keyword: 
side-channel attacksfault sensitivity analysiscountermeasuresWDDLAES
 Summary | Full Text:PDF(558.1KB)

A Design Methodology for a DPA-Resistant Circuit with RSL Techniques
Daisuke SUZUKI Minoru SAEKI Koichi SHIMIZU Akashi SATOH Tsutomu MATSUMOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/12/01
Vol. E93-A  No. 12 ; pp. 2497-2508
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis, Test and Verification
Keyword: 
side-channel attacksdifferential power analysishardware countermeasurerandom switching logicCMOS logic circuit
 Summary | Full Text:PDF(2.2MB)

Multiple-Valued Constant-Power Adder and Its Application to Cryptographic Processor
Naofumi HOMMA Yuichi BABA Atsushi MIYAMOTO Takafumi AOKI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/08/01
Vol. E93-D  No. 8 ; pp. 2117-2125
Type of Manuscript:  Special Section PAPER (Special Section on Multiple-Valued Logic and VLSI Computing)
Category: Application of Multiple-Valued VLSI
Keyword: 
cryptographic processorsside-channel attacksarithmetic circuitsmultiple-valued logicRSA cryptosystem
 Summary | Full Text:PDF(977KB)

A High-Resolution Phase-Based Waveform Matching and Its Application to Side-Channel Attacks
Naofumi HOMMA Sei NAGASHIMA Takeshi SUGAWARA Takafumi AOKI Akashi SATOH 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1 ; pp. 193-202
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Side Channel Attacks
Keyword: 
side-channel attacksDPADEMAcryptographic modulewaveform matchingphase-only correlation
 Summary | Full Text:PDF(1.2MB)

An Analysis of Leakage Factors for Dual-Rail Pre-Charge Logic Style
Daisuke SUZUKI Minoru SAEKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/01/01
Vol. E91-A  No. 1 ; pp. 184-192
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Side Channel Attacks
Keyword: 
side-channel attacksdifferential power analysishardware countermeasuredual-rail pre-charge logic styleCMOS logic circuit
 Summary | Full Text:PDF(584.6KB)

Random Switching Logic: A New Countermeasure against DPA and Second-Order DPA at the Logic Level
Daisuke SUZUKI Minoru SAEKI Tetsuya ICHIKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/01/01
Vol. E90-A  No. 1 ; pp. 160-168
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Side Channel Attacks
Keyword: 
side-channel attacksdifferential power analysishardware countermeasuresecond-order DPA random switching logicCMOS logic circuit
 Summary | Full Text:PDF(737.1KB)

Leakage Analysis of DPA Countermeasures at the Logic Level
Minoru SAEKI Daisuke SUZUKI Tetsuya ICHIKAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/01/01
Vol. E90-A  No. 1 ; pp. 169-178
Type of Manuscript:  Special Section PAPER (Special Section on Cryptography and Information Security)
Category: Side Channel Attacks
Keyword: 
side-channel attacksdifferential power analysishardware countermeasureCMOS logic circuitsecond-order DPA
 Summary | Full Text:PDF(752.1KB)