Keyword : routing flexibility

Timing-Constrained Flexibility-Driven Routing Tree Construction
Jin-Tai YAN  Yen-Hsiang CHEN  Chia-Fang LEE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7  pp. 1360-1368
Type of Manuscript: Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Programmable Logic, VLSI, CAD and Layout
Keyword: 
global routing,  routing flexibility,  Steiner tree,  timing constraint, 
  Summary |  Full Text:PDF (722.8KB)
Dynamically Programmable Parallel Processor (DPPP): A Novel Reconfigurable Architecture with Simple Program Interface
Boon-Keat TAN  Ryuji YOSHIMURA  Toshimasa MATSUOKA  Kenji TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2001/11/01
Vol. E84-D  No. 11  pp. 1521-1527
Type of Manuscript: Special Section PAPER (Special Issue on Function Integrated Information Systems)
Category: 
Keyword: 
CDMA bus,  parallel processing,  interconnection topology,  routing flexibility,  fault tolerant, 
  Summary |  Full Text:PDF (1.6MB)
A Novel Dynamically Programmable Arithmetic Array (DPAA) Processor for Digital Signal Processing
Boon-Keat TAN  Ryuji YOSHIMURA  Toshimasa MATSUOKA  Kenji TANIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/03/01
Vol. E84-A  No. 3  pp. 741-747
Type of Manuscript: Special Section PAPER (Special Section of Selected Papers from the 13th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
DPAA,  DSP,  parallel processing,  interconnection topology,  routing flexibility, 
  Summary |  Full Text:PDF (575.4KB)