Keyword : router


The Performance Evaluation of a 3D Torus Network Using Partial Link-Sharing Method in NoC Router Buffer
Naohisa FUKASE Yasuyuki MIURA Shigeyoshi WATANABE M.M. HAFIZUR RAHMAN 
Publication:   
Publication Date: 2017/10/01
Vol. E100-D  No. 10 ; pp. 2478-2492
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
interconnection networknetwork-on-chip (NoC)routermulti-port memory
 Summary | Full Text:PDF(4.8MB)

Up-Stream Dispatching of Power by Density of Power Packet
Shinya NAWATA Ryo TAKAHASHI Takashi HIKIHARA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/12/01
Vol. E99-A  No. 12 ; pp. 2581-2584
Type of Manuscript:  LETTER
Category: Systems and Control
Keyword: 
power packetup-stream dispatchingrouterpower density
 Summary | Full Text:PDF(2.3MB)

A 250 Msps, 0.5 W eDRAM-Based Search Engine Dedicated Low Power FIB Application
Hisashi IWAMOTO Yuji YANO Yasuto KURODA Koji YAMAMOTO Kazunari INOUE Ikuo OKA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/08/01
Vol. E96-C  No. 8 ; pp. 1076-1082
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
routeraddress lookuppower consumptionsearch engineTCAMlow power
 Summary | Full Text:PDF(2.8MB)

A Low-Power Packet Memory Architecture with a Latency-Aware Packet Mapping Method
Hyuk-Jun LEE Seung-Chul KIM Eui-Young CHUNG 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2013/04/01
Vol. E96-D  No. 4 ; pp. 963-966
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
routerpacket memorylow powerTCP
 Summary | Full Text:PDF(252.1KB)

Router Power Reduction through Dynamic Performance Control Based on Traffic Predictions
Hiroyuki ITO Hiroshi HASEGAWA Ken-ichi SATO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2012/10/01
Vol. E95-B  No. 10 ; pp. 3130-3138
Type of Manuscript:  PAPER
Category: Energy in Electronics Communications
Keyword: 
routerperformance controlenergy efficiency
 Summary | Full Text:PDF(1.7MB)

SOBR: A High-Performance Shared Output Buffered Router for Networks-on-Chip
Yancang CHEN Lunguo XIE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/07/01
Vol. E95-D  No. 7 ; pp. 2002-2005
Type of Manuscript:  LETTER
Category: Computer System
Keyword: 
networks-on-chiproutervirtual channelswitching
 Summary | Full Text:PDF(300.5KB)

Two-Level FIFO Buffer Design for Routers in On-Chip Interconnection Networks
Po-Tsang HUANG Wei HWANG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/11/01
Vol. E94-A  No. 11 ; pp. 2412-2424
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
two-level FIFO buffercentralized shared bufferrouteron-chip interconnection network
 Summary | Full Text:PDF(1.4MB)

Fast Packet Classification Using Multi-Dimensional Encoding
Chi Jia HUANG Chien CHEN 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2009/06/01
Vol. E92-B  No. 6 ; pp. 2044-2053
Type of Manuscript:  PAPER
Category: Internet
Keyword: 
routerpacket classificationmulti-dimensional encodingbitmap intersectionnetwork processor
 Summary | Full Text:PDF(825.2KB)

A Link Removal Methodology for Application-Specific Networks-on-Chip on FPGAs
Daihan WANG Hiroki MATSUTANI Michihiro KOIBUCHI Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2009/04/01
Vol. E92-D  No. 4 ; pp. 575-583
Type of Manuscript:  PAPER
Category: VLSI Systems
Keyword: 
network-on-chipFPGAcustomizerouter
 Summary | Full Text:PDF(491KB)

A Port Combination Methodology for Application-Specific Networks-on-Chip on FPGAs
Daihan WANG Hiroki MATSUTANI Michihiro KOIBUCHI Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2007/12/01
Vol. E90-D  No. 12 ; pp. 1914-1922
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Reconfigurable System and Applications
Keyword: 
Networks-on-ChipFPGArouterport combination
 Summary | Full Text:PDF(467.3KB)

Formalization and Analysis of Routing Loops by Inconsistencies in IP Forwarding Tables
Kazuya SUZUKI Masahiro JIBIKI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2007/10/01
Vol. E90-B  No. 10 ; pp. 2755-2763
Type of Manuscript:  Special Section PAPER (Special Section on New Challenge for Internet Technology and its Architecture)
Category: 
Keyword: 
high availabilityrouting protocolthe Internetrouter
 Summary | Full Text:PDF(307.1KB)

Low-Power Network-Packet-Processing Architecture Using Process-Learning Cache for High-End Backbone Router
Michitaka OKUNO Shin-ichi ISHIDA Hiroaki NISHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/04/01
Vol. E88-C  No. 4 ; pp. 536-543
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power LSI and Low-Power IP)
Category: Digital
Keyword: 
routerEthernetpacket-processing enginenetwork processorcache-based packet-processing engine
 Summary | Full Text:PDF(383.1KB)

A High-Speed Packet Classification Using TCAM
Masanori UGA Masaaki OMOTANI Kohei SHIOMOTO 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2002/09/01
Vol. E85-B  No. 9 ; pp. 1766-1773
Type of Manuscript:  PAPER
Category: Internet
Keyword: 
packet classificationTCAMIPv6router
 Summary | Full Text:PDF(2.6MB)

Overview of DiffServ Technology: Its Mechanism and Implementation
Takeshi AIMOTO Shigeru MIYAKE 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2000/05/25
Vol. E83-D  No. 5 ; pp. 957-964
Type of Manuscript:  INVITED PAPER (Special Issue on Next Generation Internet Technologies and Their Applications)
Category: 
Keyword: 
InternetrouterQoSDiffServpolicy management
 Summary | Full Text:PDF(523.6KB)

Scalable Internet Backbone Using Multi-Gigabit ATM-Based Connectionless Switching
Shigehiko USHIJIMA Hiroyuki ICHIKAWA Katsunori NORITAKE Naoya WATANABE 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1998/02/25
Vol. E81-B  No. 2 ; pp. 324-332
Type of Manuscript:  Special Section PAPER (Special Issue on ATM Switching Systems for future B-ISDN)
Category: ATM switch interworking
Keyword: 
connectionlessInternetrouterATMgigabitIP
 Summary | Full Text:PDF(940.8KB)

CORErouter-I: An Experimental Parallel IP Router Using a Cluster of Workstations
Mitsuru MARUYAMA Naohisa TAKAHASHI Takeshi MIEI Tsuyoshi OGURA Tetsuo KAWANO Satoru YAGI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1997/10/25
Vol. E80-B  No. 10 ; pp. 1407-1414
Type of Manuscript:  Special Section PAPER (Special Issue on Network Interworking)
Category: System architecture
Keyword: 
internetrouterTCP/IPparallel processingworkstation clusterrouting protocol
 Summary | Full Text:PDF(854.9KB)

The RDT Router Chip: A Versatile Router for Supporting a Distributed Shared Memory
Hiroaki NISHI Ken-ichiro ANJO Tomohiro KUDOH Hideharu AMANO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1997/09/25
Vol. E80-D  No. 9 ; pp. 854-862
Type of Manuscript:  Special Section PAPER (Special Issue on Architectures, Algorithms and Networks for Massively Parallel Computing)
Category: Interconnection Networks
Keyword: 
routerinterconnection networkcache coherent distributed shared memory
 Summary | Full Text:PDF(794.5KB)

Architecture of Cell Switch Router and Prototype System Implementation
Shigeo MATSUZAWA Ken'ichi NAGAMI Akiyoshi MOGI Tatsuya JINMEI Hiroshi ESAKI Yasuhiro KATSUBE 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1997/08/25
Vol. E80-B  No. 8 ; pp. 1227-1238
Type of Manuscript:  PAPER
Category: Communication Networks and Services
Keyword: 
ATMCSRcut-thruhop-by-hopIProuterprototype
 Summary | Full Text:PDF(1MB)

Proposal and Performance Evaluation of a High-Speed Internetworking Device
Akira WATANABE Yuuji KOUI Shoichiro SENO Tetsuo IDEGUCHI 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 1996/05/25
Vol. E79-B  No. 5 ; pp. 639-646
Type of Manuscript:  Special Section PAPER (Special Issue on High Speed Local Area Network)
Category: 
Keyword: 
routerperformancearchitectureinternetworkingevaluation
 Summary | Full Text:PDF(651.6KB)

A Hierarchical Global Router for Mscro-Block-Embedded Sea-of-Gates
Mototaka KURIBAYASHI Masaaki YAMADA Takashi MITSUHASHI Nobuyuki GOTO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/10/25
Vol. E76-A  No. 10 ; pp. 1694-1704
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
VLSICADrouterhierarchical decomposition
 Summary | Full Text:PDF(1MB)

A Distributed Routing System for Multilayer SOG
Takashi SHIMAMOTO Isao SHIRAKAWA Hidetaka HANE Nobuyasu YUI Nobuyuki NISHIGUCHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1993/03/25
Vol. E76-A  No. 3 ; pp. 370-376
Type of Manuscript:  Special Section PAPER (Special Section on the 5th Karuizawa Workshop on Circuits and Systems)
Category: 
Keyword: 
routerdistributionSOGrip-up and reroutevariable-cost maze
 Summary | Full Text:PDF(663.6KB)