Keyword : register file


Skewed Multistaged Multibanked Register File for Area and Energy Efficiency
Junji YAMADA Ushio JIMBO Ryota SHIOYA Masahiro GOSHIMA Shuichi SAKAI 
Publication:   
Publication Date: 2017/04/01
Vol. E100-D  No. 4 ; pp. 822-837
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
superscalar processorregister filemultibanking
 Summary | Full Text:PDF(3.2MB)

Design of a Register Cache System with an Open Source Process Design Kit for 45nm Technology
Junji YAMADA Ushio JIMBO Ryota SHIOYA Masahiro GOSHIMA Shuichi SAKAI 
Publication:   
Publication Date: 2017/03/01
Vol. E100-C  No. 3 ; pp. 232-244
Type of Manuscript:  Special Section PAPER (Special Section on Low-Power and High-Speed Chips)
Category: 
Keyword: 
register fileregister cachedigital designfreePDK
 Summary | Full Text:PDF(3.2MB)

Short Term Cell-Flipping Technique for Mitigating SNM Degradation Due to NBTI
Yuji KUNITAKE Toshinori SATO Hiroto YASUURA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2011/04/01
Vol. E94-C  No. 4 ; pp. 520-529
Type of Manuscript:  Special Section PAPER (Special Section on Circuits and Design Techniques for Advanced Large Scale Integration)
Category: 
Keyword: 
NBTISRAMstatic noise marginstress probabilityregister filecache memory
 Summary | Full Text:PDF(1.2MB)

Register File Size Reduction through Instruction Pre-Execution Incorporating Value Prediction
Yusuke TANAKA Hideki ANDO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2010/12/01
Vol. E93-D  No. 12 ; pp. 3294-3305
Type of Manuscript:  PAPER
Category: Computer System
Keyword: 
microarchitecturemicroprocessorinstruction pre-executionvalue predictionregister file
 Summary | Full Text:PDF(541.3KB)

A Lower-Power Register File Based on Complementary Pass-Transistor Adiabatic Logic
Jianping HU Tiefeng XU Hong LI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2005/07/01
Vol. E88-D  No. 7 ; pp. 1479-1485
Type of Manuscript:  Special Section PAPER (Special Section on Recent Advances in Circuits and Systems--Part 1)
Category: Digital Circuits and Computer Arithmetic
Keyword: 
register filelow poweradiabatic logicVLSI design
 Summary | Full Text:PDF(646KB)

Designs of Building Blocks for High-Speed, Low-Power Processors
Tadayoshi ENOMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/02/01
Vol. E85-C  No. 2 ; pp. 331-338
Type of Manuscript:  Special Section PAPER (Special Issue on High-Performance and Low-Power Microprocessors)
Category: High-Performance Technologies
Keyword: 
register filecache SRAMGaAspower dissipation
 Summary | Full Text:PDF(2.4MB)

A New Hardware/Software Partitioning Algorithm for DSP Processor Cores with Two Types of Register Files
Nozomu TOGAWA Takashi SAKURAI Masao YANAGISAWA Tatsuo OHTSUKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2001/11/01
Vol. E84-A  No. 11 ; pp. 2802-2807
Type of Manuscript:  Special Section LETTER (Special Section on VLSI Design and CAD Algorithms)
Category: Hardware/Software Codesign
Keyword: 
hardware/software cosynthesishardware/software partitioningdigital signal processor (DSP)register filehardware unit
 Summary | Full Text:PDF(321.2KB)