Keyword : redundancy


End-to-End Redundancy and Maintenance Condition Design for Nationwide Optical Transport Network
Yoshihiko UEMATSU Shohei KAMAMURA Hiroshi YAMAMOTO Aki FUKUDA Rie HAYASHI 
Publication:   
Publication Date: 2018/11/01
Vol. E101-B  No. 11 ; pp. 2267-2276
Type of Manuscript:  PAPER
Category: Transmission Systems and Transmission Equipment for Communications
Keyword: 
optical transport networkavailabilityredundancymaintenance conditionresource poolfailure-recovery time
 Summary | Full Text:PDF(2.7MB)

A New Read Scheme for High-Density Emerging Memories
Takashi OHSAWA 
Publication:   
Publication Date: 2018/06/01
Vol. E101-C  No. 6 ; pp. 423-429
Type of Manuscript:  PAPER
Category: Electronic Circuits
Keyword: 
ReRAMSTT-MRAMPCRAMmemristorreference celldummy cellredundancybit yieldweighted average
 Summary | Full Text:PDF(1.1MB)

Placement of Virtual Storages for Distributed Robust Cloud Storage
Yuya TARUTANI Yuichi OHSITA Masayuki MURATA 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2016/04/01
Vol. E99-B  No. 4 ; pp. 885-893
Type of Manuscript:  PAPER
Category: Network Management/Operation
Keyword: 
data centercloud storage systemfault toleranceredundancy
 Summary | Full Text:PDF(1MB)

Redundancy-Optimal FF Codes for a General Source and Its Relationships to the Rate-Optimal FF Codes
Mitsuharu ARIMURA Hiroki KOGA Ken-ichi IWATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2013/12/01
Vol. E96-A  No. 12 ; pp. 2332-2342
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: Source Coding
Keyword: 
fixed-to-fixed length source codinginformation-spectrum methodsgeneral sourcescoding rateredundancy
 Summary | Full Text:PDF(670.1KB)

Robust Cyclic ADC Architecture Based on β-Expansion
Rie SUZUKI Tsubasa MARUYAMA Hao SAN Kazuyuki AIHARA Masao HOTTA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/04/01
Vol. E96-C  No. 4 ; pp. 553-559
Type of Manuscript:  Special Section PAPER (Special Section on Solid-State Circuit Design—Architecture, Circuit, Device and Design Methodology)
Category: 
Keyword: 
robust ADCβ-expansionredundancycyclic ADCradix-value estimation algorithm
 Summary | Full Text:PDF(1.8MB)

Novel Fuse Scheme with a Short Repair Time to Maximize Good Chips per Wafer in Advanced SoCs
Chizu MATSUMOTO Yuichi HAMAMURA Michinobu NAKAO Kaname YAMASAKI Yoshikazu SAITO Shun'ichi KANEKO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2013/01/01
Vol. E96-C  No. 1 ; pp. 108-114
Type of Manuscript:  PAPER
Category: Semiconductor Materials and Devices
Keyword: 
random access memorysystem-on-chipredundancyfuse
 Summary | Full Text:PDF(1.5MB)

SAR ADC Algorithm with Redundancy and Digital Error Correction
Tomohiko OGAWA Haruo KOBAYASHI Yosuke TAKAHASHI Nobukazu TAKAI Masao HOTTA Hao SAN Tatsuji MATSUURA Akira ABE Katsuyoshi YAGI Toshihiko MORI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2010/02/01
Vol. E93-A  No. 2 ; pp. 415-423
Type of Manuscript:  Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
SAR ADCdigital error correctionnon-binaryredundancy
 Summary | Full Text:PDF(632.9KB)

Distributed Stable Flooding Using Delay Function Based on Redundancy
Wonjong NOH 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2009/12/01
Vol. E92-B  No. 12 ; pp. 3923-3926
Type of Manuscript:  LETTER
Category: Network
Keyword: 
delayed floodingredundancysensor/ad-hoc network
 Summary | Full Text:PDF(149.3KB)

A Novel Approach to Overlay Multicasting Schemes for Multi-Hop Ad-Hoc Networks
Namhi KANG Jejun OH Younghan KIM 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2008/06/01
Vol. E91-B  No. 6 ; pp. 1862-1873
Type of Manuscript:  PAPER
Category: Network
Keyword: 
ad-hoc networksoverlay multicastingroutingredundancyperformance evaluation
 Summary | Full Text:PDF(539.2KB) | Errata[Uploaded on August 1,2008]

An Analysis for Fault-Tolerant 3D Processor Arrays Using 1.5-Track Switches
Tadayoshi HORITA Yuuji KATOU Itsuo TAKANAMI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2008/02/01
Vol. E91-A  No. 2 ; pp. 623-632
Type of Manuscript:  PAPER
Category: Reliability, Maintainability and Safety Analysis
Keyword: 
3D mesh-connected processor arrays1.5-track switchesreconfigurationfault toleranceredundancy
 Summary | Full Text:PDF(757.9KB)

Constitutive Synthesis of Physiological Networks
Seiichiro NAKABAYASHI Nobuko TANIMURA Toshikazu YAMASHITA Shinichiro KOKUBUN 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2007/01/01
Vol. E90-C  No. 1 ; pp. 116-119
Type of Manuscript:  INVITED PAPER (Special Section on Microoptomechatronics)
Category: 
Keyword: 
nonlinear oscillatorcomplex networkphysiological functionsrobustnessredundancy
 Summary | Full Text:PDF(841.1KB)

Analysis of Zero-Redundancy Estimator with a Finite Window for Markovian Source
Mohammad M. RASHID Tsutomu KAWABATA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/10/01
Vol. E88-A  No. 10 ; pp. 2819-2825
Type of Manuscript:  Special Section PAPER (Special Section on Information Theory and Its Applications)
Category: Information Theory
Keyword: 
universal source codingredundancyzero-redundancy estimatorMarkov source
 Summary | Full Text:PDF(202KB)

Highly Flexible Row and Column Redundancy and Cycle Time Adaptive Read Data Path for Double Data Rate Synchronous Memories
Kiyohiro FURUTANI Takeshi HAMAMOTO Takeo MIKI Masaya NAKANO Takashi KONO Shigeru KIKUDA Yasuhiro KONISHI Tsutomu YOSHIHARA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2005/02/01
Vol. E88-C  No. 2 ; pp. 255-263
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
DRAMredundancyhigh speedhigh density
 Summary | Full Text:PDF(3.1MB)

A Fast Graph-Based Alternative Wiring Scheme for Boolean Networks
Yu-Liang WU Wangning LONG Hongbing FAN 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2000/06/25
Vol. E83-A  No. 6 ; pp. 1131-1137
Type of Manuscript:  Special Section PAPER (Special Section of Papers Selected from 1999 International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC'99))
Category: 
Keyword: 
rewiringlogic synthesiscircuit minimizationredundancy
 Summary | Full Text:PDF(895.7KB)

Real-Time Restoration of Nonstationary Biomedical Signals under Additive Noises
Junichi HORI Yoshiaki SAITOH Tohru KIRYU 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/10/25
Vol. E82-D  No. 10 ; pp. 1409-1416
Type of Manuscript:  PAPER
Category: Medical Electronics and Medical Information
Keyword: 
restorationband-limitationreal-timeadditive noiseredundancy
 Summary | Full Text:PDF(581KB)

A Board Level Parallel Test Circuit and a Short Circuit Failure Repair Circuit for High-Density, Low-Power DRAMs
Kiyohiro FURUTANI Tsukasa OOISHI Mikio ASAKURA Hideto HIDAKA Hideyuki OZAKI Michihiro YAMADA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1997/04/25
Vol. E80-C  No. 4 ; pp. 582-589
Type of Manuscript:  Special Section PAPER (Special Issue on Circuit Technologies for Memory and Analog LSIs)
Category: 
Keyword: 
DRAMtestredundancy
 Summary | Full Text:PDF(642.9KB)

Redundancy Circuit for a Sub-nanosecond, Megabit ECL-CMOSSRAM
Kenichi OHHATA Takeshi KUSUNOKI Hiroaki NAMBU Kazuo KANETANI Toru MASUDA Masayuki OHAYASHI Satomi HAMAMOTO Kunihiko YAMAGUCHI Youji IDEI Noriyuki HOMMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1996/03/25
Vol. E79-C  No. 3 ; pp. 415-423
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
redundancyECL-CMOS SRAMSRAM with logic gateBiCMOS
 Summary | Full Text:PDF(892.2KB)

A Method to Reduce Redundant Hidden Nodes
Iwao SEKITA Takio KURITA David K. Y. CHIU Hideki ASOH 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1994/04/25
Vol. E77-D  No. 4 ; pp. 443-449
Type of Manuscript:  Special Section PAPER (Special Issue on Neurocomputing)
Category: Network Synthesis
Keyword: 
neural networkredundancylinearly dependentregressionPCA
 Summary | Full Text:PDF(598.7KB)

Estimation of Yield Suppression for 1.5 V-1 Gbit DRAMs Caused by Threshold Voltage Variation of MOSFET due to Microscopic Fluctuation in Dopant Distributions
Shigeyoshi WATANABE Takaaki MINAMI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/02/25
Vol. E77-C  No. 2 ; pp. 273-279
Type of Manuscript:  PAPER
Category: Integrated Electronics
Keyword: 
1 Gbit DRAM1.5 Vyieldthreshold voltage variationredundancy
 Summary | Full Text:PDF(563.6KB)

Statistical Memory Yield Analysis and Redundancy Design Considering Fabrication Line Improvement
Ken-ichi IMAMIYA Jun-ichi MIYAMOTO Nobuaki OHTSUKA Naoto TOMITA Yumiko IYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/11/25
Vol. E76-C  No. 11 ; pp. 1626-1631
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: Non-volatile Memory
Keyword: 
redundancymemoryyieldEPROM
 Summary | Full Text:PDF(533.4KB)

A Bitline Control Circuit Scheme and Redundancy Technique for High-Density Dynamic Content Addressable Memories
Tadato YAMAGATA Masaaki MIHARA Takeshi HAMAMOTO Yasumitsu MURAI Toshifumi KOBAYASHI Michihiro YAMADA Hideyuki OZAKI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1993/11/25
Vol. E76-C  No. 11 ; pp. 1657-1664
Type of Manuscript:  Special Section PAPER (Special Issue on LSI Memories)
Category: Application Specific Memory
Keyword: 
content addressable memoryassociative memorydynamic memoryredundancy
 Summary | Full Text:PDF(876.1KB)

Eliminating Redundant Components While Building Solid Models by Surface Points Evaluation
Chun YANG Shan Jun ZHANG Toshio KAWASHIMA Yoshinao AOKI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1992/11/25
Vol. E75-A  No. 11 ; pp. 1561-1569
Type of Manuscript:  PAPER
Category: Computer Aided Design (CAD)
Keyword: 
CSGB-repsredundancydispersed surface points setgeometry shape blocknull blocksample boundary segment
 Summary | Full Text:PDF(893.8KB)