Keyword : pipeline architecture


Design and Demonstration of Pipelined Circuits Using SFQ Logic
Akira AKAHORI Akito SEKIYA Takahiro YAMADA Akira FUJIMAKI Hisao HAYAKAWA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2002/03/01
Vol. E85-C  No. 3 ; pp. 641-644
Type of Manuscript:  Special Section PAPER (Special Issue on Superconductive Electronics)
Category: Digital Devices and Their Applications
Keyword: 
SFQpipeline architectureparameter spreadleakage currentparameter optimization method
 Summary | Full Text:PDF(490.6KB)

High Speed DRAMs with Innovative Architectures
Shigeo OHSHIMA Tohru FURUYAMA 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1994/08/25
Vol. E77-C  No. 8 ; pp. 1303-1315
Type of Manuscript:  INVITED PAPER (Special Section on High Speed and High Density Multi Functional LSI Memories)
Category: DRAM
Keyword: 
DRAMmemory bottleneckdata bandwidthlatencysynchronous DRAMpipeline architecturedata prefetchingcache DRAMfast copybackRambus interfaceRambus DRAMprotocol packetPLL
 Summary | Full Text:PDF(983.9KB)