Keyword : partitioning


Photo-Diode Array Partitioning Problem for a Rectangular Region
Kunihiro FUJIYOSHI Takahisa IMANO 
Publication:   
Publication Date: 2017/12/01
Vol. E100-A  No. 12 ; pp. 2851-2856
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
partitioningphoto diode arrayHamiltonian pathdivide and conquer
 Summary | Full Text:PDF(857.6KB)

Efficient Multiplexer Networks for Field-Data Extractors and Their Evaluations
Koki ITO Kazushi KAWAMURA Yutaka TAMIYA Masao YANAGISAWA Nozomu TOGAWA 
Publication:   
Publication Date: 2017/04/01
Vol. E100-A  No. 4 ; pp. 1015-1028
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
field-data extractormultiplexer networkpartitioningrotator
 Summary | Full Text:PDF(1.7MB)

Bi-Partitioning Based Multiplexer Network for Field-Data Extractors
Koki ITO Kazushi KAWAMURA Yutaka TAMIYA Masao YANAGISAWA Nozomu TOGAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/07/01
Vol. E99-A  No. 7 ; pp. 1410-1414
Type of Manuscript:  Special Section LETTER (Special Section on Design Methodologies for System on a Chip)
Category: 
Keyword: 
multiplexer networkpartitioningfield-data extractor
 Summary | Full Text:PDF(234KB)

Layer-Aware 3D-IC Partitioning for Area-Overhead Reduction Considering the Power of Interconnections and Pads
Yung-Hao LAI Yang-Lang CHANG Jyh-Perng FANG Lena CHANG Hirokazu KOBAYASHI 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2016/06/01
Vol. E99-A  No. 6 ; pp. 1206-1215
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
3D-ICTSVpartitioningarea-overhead reductionpower consumption
 Summary | Full Text:PDF(2.8MB)

Greedy Approach Based Heuristics for Partitioning Sparse Matrices
Jiasen HUANG Junyan REN Wei LI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2015/10/01
Vol. E98-D  No. 10 ; pp. 1847-1851
Type of Manuscript:  LETTER
Category: Fundamentals of Information Systems
Keyword: 
partitioninggreedy approachrecursive merginghighest mean densitylowest average relative difference
 Summary | Full Text:PDF(783KB)

Fast Mode and Depth Decision for HEVC Intra Prediction Based on Edge Detection and Partition Reconfiguration
Gaoxing CHEN Lei SUN Zhenyu LIU Takeshi IKENAGA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2014/11/01
Vol. E97-A  No. 11 ; pp. 2130-2138
Type of Manuscript:  Special Section PAPER (Special Section on Smart Multimedia & Communication Systems)
Category: 
Keyword: 
HEVCintra predictionpartitioningmode decisiongradient
 Summary | Full Text:PDF(1.4MB)

Memory-Access-Driven Context Partitioning for Window-Based Image Processing on Heterogeneous Multicore Processors
Hasitha Muthumala WAIDYASOORIYA Yosuke OHBAYASHI Masanori HARIYAMA Michitaka KAMEYAMA 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 2012/02/01
Vol. E95-D  No. 2 ; pp. 354-363
Type of Manuscript:  Special Section PAPER (Special Section on Reconfigurable Systems)
Category: Design Methodology
Keyword: 
memory allocationpartitioningreconfigurable processors
 Summary | Full Text:PDF(844.7KB)

A Fast IP Address Lookup Algorithm Based on Search Space Reduction
Hyuntae PARK Hyunjin KIM Hong-Sik KIM Sungho KANG 
Publication:   IEICE TRANSACTIONS on Communications
Publication Date: 2010/04/01
Vol. E93-B  No. 4 ; pp. 1009-1012
Type of Manuscript:  LETTER
Category: Switching for Communications
Keyword: 
IP address lookupsearch space reductionpartitioning
 Summary | Full Text:PDF(230.6KB)

Power Minimization for Dual- and Triple-Supply Digital Circuits via Integer Linear Programming
Ki-Yong AHN Chong-Min KYUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2009/09/01
Vol. E92-A  No. 9 ; pp. 2318-2325
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
system on chiplow power designpartitioninginteger linear programming
 Summary | Full Text:PDF(380.5KB)

Thermal-Aware Placement Based on FM Partition Scheme and Force-Directed Heuristic
Jing LI Hiroshi MIYASHITA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2006/04/01
Vol. E89-A  No. 4 ; pp. 989-995
Type of Manuscript:  Special Section PAPER (Special Section on Selected Papers from the 18th Workshop on Circuits and Systems in Karuizawa)
Category: 
Keyword: 
VLSI circuit physical designthermal placementpartitioningreliabilityforce-directed algorithm
 Summary | Full Text:PDF(435.7KB)

An Engineering Change Orders Design Method Based on Patchwork-Like Partitioning for High Performance LSIs
Yuichi NAKAMURA Ko YOSHIKAWA Takeshi YOSHIMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2005/12/01
Vol. E88-A  No. 12 ; pp. 3351-3357
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: Logic Synthesis
Keyword: 
logic designengineering change orderspartitioning
 Summary | Full Text:PDF(658.2KB)

A Hierarchical Cost Estimation Technique for High Level Synthesis
Mahmoud MERIBOUT Masato MOTOMURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2003/02/01
Vol. E86-A  No. 2 ; pp. 444-461
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
high level synthesishardware cost estimationmultiplexer-based architecturebus-based architectureschedulingallocationpartitioning
 Summary | Full Text:PDF(2.5MB)

A Hierarchical Circuit Clustering Algorithm with Stable Performance
Seung-June KYOUNG Kwang-Su SEONG In-Cheol PARK Chong-Min KYUNG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1999/09/25
Vol. E82-A  No. 9 ; pp. 1987-1993
Type of Manuscript:  LETTER
Category: VLSI Design Technology and CAD
Keyword: 
VLSICADpartitioningclustering
 Summary | Full Text:PDF(417.3KB)

A Fault-Tolerant Deadlock-Free Multicast Algorithm for Wormhole Routed Hypercubes
Shih-Chang WANG Jeng-Ping LIN Sy-Yen KUO 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1999/03/25
Vol. E82-D  No. 3 ; pp. 677-686
Type of Manuscript:  PAPER
Category: Fault Tolerant Computing
Keyword: 
fault tolerancewormhole routinghypercubemulticastpartitioning
 Summary | Full Text:PDF(1.2MB)

A Balanced-Mesh Clock Routing Technique for Performance Improvement
Hidenori SATO Hiroaki MATSUDA Akira ONOZAWA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1997/08/25
Vol. E80-A  No. 8 ; pp. 1489-1495
Type of Manuscript:  PAPER
Category: VLSI Design Technology and CAD
Keyword: 
LSICADlayout designclock skewpartitioningroutingMPEG2
 Summary | Full Text:PDF(592.3KB)

A New Approach of Fractal-Analysis Based Module Clustering for VLSI Placement
Masahiko TOYONAGA Shih-Tsung YANG Isao SHIRAKAWA Toshiro AKINO 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 1994/12/25
Vol. E77-A  No. 12 ; pp. 2045-2052
Type of Manuscript:  Special Section PAPER (Special Section on VLSI Design and CAD Algorithms)
Category: 
Keyword: 
clusteringfractal analysisplacementpartitioning
 Summary | Full Text:PDF(747.9KB)