Keyword : parasitic resistance

Impact of Self-Heating in Wire Interconnection on Timing
Toshiki KANAMOTO  Takaaki OKUMURA  Katsuhiro FURUKAWA  Hiroshi TAKAFUJI  Atsushi KUROKAWA  Koutaro HACHIYA  Tsuyoshi SAKATA  Masakazu TANAKA  Hidenari NAKASHIMA  Hiroo MASUDA  Takashi SATO  Masanori HASHIMOTO 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 2010/03/01
Vol. E93-C  No. 3  pp. 388-392
Type of Manuscript: BRIEF PAPER
Category: 
Keyword: 
interconnect,  delay variation,  parasitic resistance,  thermal,  temperature,  self-heat,  SoC, 
  Summary |  Full Text:PDF (219.6KB)
A 1.2-V, 12-bit, 200 MSample/s Current-Steering D/A Converter in 90-nm CMOS
Takeshi UENO  Takafumi YAMAJI  Tetsuro ITAKURA 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2007/02/01
Vol. E90-A  No. 2  pp. 365-371
Type of Manuscript: Special Section PAPER (Special Section on Analog Circuit Techniques and Related Topics)
Category: 
Keyword: 
D/A converter,  current steering,  low voltage,  parasitic resistance,  tree structure, 
  Summary |  Full Text:PDF (702.7KB)
Advanced Characterization Method for Sub-Micron DRAM Cell Transistors
Ikuo KURACHI 
Publication:   IEICE TRANSACTIONS on Electronics
Publication Date: 1999/04/20
Vol. E82-C  No. 4  pp. 618-623
Type of Manuscript: Special Section PAPER (Special Issue on Microelectronic Test Structures)
Category: 
Keyword: 
DRAM,  cell transistors,  test structure,  parameter extraction,  parasitic resistance, 
  Summary |  Full Text:PDF (718.3KB)