Keyword : parallel process

High-Speed FPGA Implementation of the SHA-1 Hash Function
Je-Hoon LEE  Sang-Choon KIM  Young-Jun SONG 
Publication:   IEICE TRANSACTIONS on Fundamentals of Electronics, Communications and Computer Sciences
Publication Date: 2011/09/01
Vol. E94-A  No. 9  pp. 1873-1876
Type of Manuscript: LETTER
Category: Cryptography and Information Security
Keyword: 
hash algorithm,  SHA-1,  unfolding technique,  parallel process, 
  Summary |  Full Text:PDF (1.1MB)
Process Composition and Interleave Reduction in Parallel Process Specification
Makoto TSUJIGADO  Teruo HIKITA  Jun GINBAYASHI 
Publication:   IEICE TRANSACTIONS on Information and Systems
Publication Date: 1995/01/20
Vol. E78-D  No. 1  pp. 27-36
Type of Manuscript: PAPER
Category: Software Systems
Keyword: 
formal specification,  interleave reduction,  parallel process,  process composition, 
  Summary |  Full Text:PDF (697KB)